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Linux/AM3352: MLO fail switching logic

Part Number: AM3352

Tool/software: Linux

Hi,

I would like to know how ROM code will switch MLO in case MLO fail to start from 0x00000000. I understand ROM code will check for below address for valid MLO.

0x00000000
0x00020000
0x00040000
0x00060000

I have flashed two copies of MLO one at 0x00000000 & second 0x00020000. I would like ROM code to use the second address if it fails to boot from the first address.

  • Hi,

    What type of memory are you using?

  • I am having MLO in NOR.

    Thanks

  • Parallel or serial NOR? If serial, what type - SPI, QSPI?

  • Anyway, to answer your question:


    For parallel NOR, connected to the GPMC interface there is no redundancy check. There are two boot modes available:
    For Fast External boot see section 26.1.7.1 in the AM335x TRM Rev. P for details.
    For XIP boot see section 26.1.8.2 in the AM335x TRM Rev. P for details.


    For SPI NOR boot redundancy is supported. See section 26.1.8.6.3 in the AM335x TRM Rev. P for details.

  • The documentation for SPI NOR redundancy is inconclusive, from the TRM:
    26.1.8.6.3 SPI Read Sector Procedure
    The ROM Code reads SPI data from the boot device in 512 byte sectors. For each call to the SPI Read
    Sector routine, the SPI Read Command (0x03) is sent along with the 24 bit start address of the data to be
    read. Each Sector = 512bytes and the ROM bootloader will attempt the following:
    1. Read Sector 1, Check the address: 0x0
    2. Read Sector 2, Check the address: 0x200
    3. Read Sector 3, Check the address: 0x400
    4. Read Sector 4, Check the address: 0x600
    The addresses mentioned above should contain the image size. If the value of the addresses mentioned
    above is neither 0x0 nor 0xFFFFFFFF, then the boot will proceed else it will move to the next sector. If no
    image is found after checking four sectors, the ROM bootloader will move to the next device.

    One sector is too small to fit a copy of the MLO. Is there supposed to be a second address in each sector containing the offset of the MLO too?
    i.e. If the ROM code reads address 0x0 and finds a valid size, from where is the MLO read?

    There is a similar question with a inconclusive answer in this thread:
    http://e2e.ti.com/support/processors/f/791/t/386653?SPI-NOR-booting-issue-in-am335x

    Best Regards
    Oskar

  • Hello Oskar,

    Based on my internal discussion with our experts, the ROM code considers a booting image to be valid if the first four bytes of the sector is not equal to 0000 0000h or FFFF FFFFh. Therefore, the ROM code searches for one valid image out of the four by walking over the first four blocks of the mass storage space.

    Regards,
    Krunal

  • Hi Krunal,

    Thanks for the information!

    So if I understand it correctly, to use multiple copies we would need to create a "SSSPL" (super small secondary program loader) that fits into a 512 byte sector that calls MLO/SPL?

    Some more guidance of how the SPI NOR multi copy feature is intended to be implemented would be great.

    Best Regards,

    Oskar

  • Oskar Nilsson said:

    1. Read Sector 1, Check the address: 0x0
    2. Read Sector 2, Check the address: 0x200
    3. Read Sector 3, Check the address: 0x400
    4. Read Sector 4, Check the address: 0x600

    One way this would make sense is if the address mentioned above is the block or sector number that is read, then each area would be big enough to fit the MLO and it would better match how the ROM NAND code works.

  • Hello Oskar,

    Based on my internal discussion and the following thread, the idea behind having multiple sectors is to act as a fail-safe feature in case some initial sectors are damaged. It was never intended to be used for redundant images.

    Regards,
    Krunal