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Compiler/TMS320C6678: Variables in Shared Memory: Initialization

Idris Kempf
Intellectual 685 points
Part Number: TMS320C6678

Tool/software: TI C/C++ Compiler

Hi there,

My main.c includes a header utils.h and in utils.c I have the following:

I defined global constants like
const int var_1 = 1;

and each core prints them. What they print is not what is defined above, e.g. var_1 is not equal to 1. What do I need to do s.t. when core1 prints var_1 I get 1? My guess was that some things with initialization go wrong? All data is placed in shared memory.

What I tried:

1.) Place them in a custom section (.shared_section  > MSMCSRAM in lnk.cmd):

#pragma DATA_SECTION (var_1, ".shared_section")
const int var_1 = 1;

Variables are placed in the right section, still the output is !=1

2.) I added shared_section: load  >> MSMCSRAM to lnk.cmd but no change

(In the end, I would like to place these vars in the section .shared_section.)

Thank you very much for your help.

  • 0
    TI__Guru** 116170 points

    Please indicate if you are using TI RTOS or bare-metal development. If you are using TI RTOS then please checkout the IPC examples and the image processing demo .cfg files on how the shared Memory regions are setup. Another major aspect with using shared memory is management of the cache. If core 0 writes the memory location, it need to writeback invalidate the cache and the other cores need to Invalidate the cache before reading from the location.

    Please refer to Multicore programming guide for more such tips:

    http://www.ti.com/lit/an/sprab27b/sprab27b.pdf

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Intellectual 685 points

    Hi Rahul,

    I made this example without any TI RTOS. My problem is that none of the cores actually writes to this location - the variable is defined as const. I am aware of the CSL functions regarding invalidating and writing-back the cache. This is way on start-up I just invalidate the whole cache on all cores. What helped was to write

    .shared_section: {*}  > MSMCSRAM

    instead of

    .shared_section: > MSMCSRAM

    I couldn't really figure out why the first one actually works without any warning though. I have posted a related thread in https://e2e.ti.com/support/processors/f/791/p/823735/3047524#3047524 and will continue the discussion there.

    Thanks a lot for your answer.