• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 99 subscribers
  • Views 1844 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

OMAP-L138 - programming Timer 2 and 3

Deepak John Paul
Prodigy 120 points
Other Parts Discussed in Thread: OMAP-L138

Hi

I am developing an application on OMAP-L138 processor, for which I am using both the timers 2 and 3 in ARM core, selecting internal clock as the clock input. What is the source for the clock 2 and 3? The clock structures are not defined in the board specific file da850.c. I manually defined the structures for timer 2 and 3.

When I use clk_get_rate() in my kernel mode driver. I am getting 24000000. But when I load the period register with this value, I am not getting any interrupt.

The final application will use both the ARM and the DSP core, Does the timers 2 and 3 are used somewhere by the DSP core? If so, Will this cause any issues?

I will be happy to give more inputs about the problem if you need.

Thanks & Regards

Deepak John paul

  • 0
    TI__Expert 8785 points

    Deepak John Paul said:
    What is the source for the clock 2 and 3?

    If you are using internal device clock, the Timer64P2/3 would run off of PLL0_SYSCLK2. 

    Deepak John Paul said:
    But when I load the period register with this value, I am not getting any interrupt.

    Can you check SUSPSRC register in the SYSCFG0 module to verify that ARM has control of the timer peripherals.

    --Christina

  • 0 in reply to clam
    Prodigy 120 points

    Hi Christina

    I have writen a code to use the timer for my application.
    I followed the steps given below,

    1. Modified the BSP file da850.c by defining structures for timer 2 and 3 in with parent clk as pll0_aux_clk (similar to that of timer 0 and 1). ( I am using kernel version 2.6.33-rc4-prempt that came with the DVDSDK)
    2. When I checked the value using clk_get_rate() it returned 24000000.
    3. Selected internal clock as source for timers  by writing 0 to TCR
    4. Reset the timer12 and timer34
    5. Set the 64 bit mode in TGCR
    6. Unreset the timer12 and timer34
    7. Disabled all the interrupts in INTCTLSTAT
    8. Reset the timer counter (TIM12 and TIM34)
    9. Enabled all the interrupts in INTCTLSTAT
    10. Loaded the counter value 24000000 in PRD12 and 0 to PRD34 (assuming that the value 24000000 will give a timing of 1 second)
    11. Started the timer in one shot mode

    But the timer is not expiring at 1 second. After some seconds the interrupt comes and the code in the ISR is getting executed.

    Am I missing something related to the configuration?

    Thanks & Regrads

    Deepak

  • 0 in reply to Deepak John Paul
    TI__Expert 8785 points

    Can you verify that the SUSPSRC register has Timer64P2/3 configured to ARM?  I do not see that in your steps.

    --Christina

  • 0 in reply to clam
    Prodigy 120 points

    Hi Christina

    After reading the SUSPRC register I see that the Timer2 and 3 is controlled by ARM. I followed the documentation sprufm5b.pdf to configure the timer and configuring SYSCFG is not mentioned there, maybe it can be added.

    Finally got the timer working it is sourced by the DDR clock its frequency is 132MHz when the value 132000000 is loaded into the period register the timer expires in one second

     

    I would be very happy if you can support in me in the following tasks

    1. Can the priority of IRQ of the timer2 and timer3 be changed? If so how?

    2. Please provide me a sample code in which I can use the shared memory between ARM and DSP to set or read a variable running in ARM core from the DSP core and vice versa. Also suggest readings if any.

     

    Thanks & Regards

    Deepak

  • 0 in reply to Deepak John Paul
    TI__Expert 8785 points

    Deepak,

    I'm glad you got the TIMER working. 

    Unfortunately, for your next two questions, it's not in my area of expertise.  Can you please make another post for it?

    --Christina