Part Number: AM6527
On the device datasheet, page 105, notes 2 & 3:
(2) The net connecting CAP_VDDA_1P8_SDIO and VDDA_1P8_SDIO to VDDS6 or VDDS7 must be connected to a 3.3-uF decoupling capacitor. VDDA_1P8_SDIO, CAP_VDDA_1P8_SDIO, CAP_VDDSHV_SDIO, and VDDA_3P3_SDIO must be connected to VSS, when SDIO_LDO is not used with either MMC0 or MMC1.
(3) When CAP_VDDSHV_SDIO is connected to VDDSHV6 or VDDSHV7, the entire net which connects these pins should not exceed TBDuF of decoupling capacitance. When SDIO LDO is not used, this pin should be left unconnected.
For note 2, the evaluation board used a 1uF capacitor while the datasheet says 3.3uF. Can you confirm that 3.3UF is the correct value?
For note 3, we copied the evaluation board as well with a 1uF cap, but the total capacitance allowed is still marked as TBD on this latest revision datasheet. Do you know what that value should be?
