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TDA2P-ACD: Two independent GPIO interrupts

Part Number: TDA2P-ACD

Hi all,

I want to configure interrupts for two different GPIO pins on same GPIO base (GPIO4) on IPU2. Interrupts are working fine independently, ISR is activated correctly. But, when I try to configure both interrupts to work together, strange behavior happens, for example, one ISR is constantly active (ISR is activated about 180 times in second). One GPIO should have 1 Hz pulse and another from 15 - 60 Hz. Both interrupts are configured on rising edge.

Do you know what can cause this problem, one suggestions, some specific sequence during configuration...?

Best regards,

Stefan.

  • Hi Stefan,

    Can you share the sequence which you are using currently.

    Are you using any prints in ISR?

    Regards,

    Rishabh

  • Hi Rishabh,

    This is code snippet how we configure interrupts. First, we configure one interrupt, after that we repeat same procedure, but for other GPIO (gpio4_4) with different INTR_ID an XBAR_ID.

    Only after second interrupt has been configured we have the problem. Yes, we used prints inside ISR, because interrupts shouldn't happen often (max 60 Hz), but we also tried to remove prints and use LED diode instead, but problem remains. 

    #define ISS_TIMESTAMP_IRQ1_BASE (SOC_GPIO4_BASE)
    #define ISS_TIMESTAMP_IRQ1_PIN (9U)
    #define ISS_TIMESTAMP_IRQ1_INTR_ID (51U)
    #define ISS_TIMESTAMP_IRQ1_XBAR_ID (CSL_XBAR_INST_IPU2_IRQ_51)
    #define ISS_TIMESTAMP_IRQ1_SRC (CSL_XBAR_GPIO4_IRQ_1)
    #define ISS_TIMESTAMP_IRQ1_CLKCTRL (CM_L4PER_GPIO4_CLKCTRL)
    #define ISS_TIMESTAMP_IRQ1_CLKCTRL_MASK (CM_L4PER_GPIO4_CLKCTRL_IDLEST_MASK)
    #define ISS_TIMESTAMP_IRQ1_PIN_BALL (CTRL_CORE_PAD_VIN2A_D8)

    Void someFunction(Void)

    {

    ...

    IssTimestamp_irqConfigIntr()

    / Configure and enable debouncing feature /
    GPIODebounceTimeConfig(ISS_TIMESTAMP_IRQ1_BASE, 0xFF);

    GPIODebounceFuncControl(ISS_TIMESTAMP_IRQ1_BASE, ISS_TIMESTAMP_IRQ1_PIN,
    GPIO_DEBOUNCE_FUNC_ENABLE);

    GPIOIntTypeSet(ISS_TIMESTAMP_IRQ1_BASE, ISS_TIMESTAMP_IRQ1_PIN,
    GPIO_INT_TYPE_FALL_EDGE);

    / Set pin direction as input /
    GPIODirModeSet(ISS_TIMESTAMP_IRQ1_BASE, ISS_TIMESTAMP_IRQ1_PIN, GPIO_DIR_INPUT);

    / Clear interrupt /
    GPIOPinIntDisable(ISS_TIMESTAMP_IRQ1_BASE, GPIO_INT_LINE_1, ISS_TIMESTAMP_IRQ1_PIN);
    GPIOPinIntClear(ISS_TIMESTAMP_IRQ1_BASE, GPIO_INT_LINE_1, ISS_TIMESTAMP_IRQ1_PIN);

    / Enable interrupt /
    GPIOPinIntEnable(ISS_TIMESTAMP_IRQ1_BASE, GPIO_INT_LINE_1, ISS_TIMESTAMP_IRQ1_PIN);

    }

    static Int32 IssTimestamp_irqConfigIntr(Void)
    {
    Int32 status = SYSTEM_LINK_STATUS_SOK;
    UInt32 cookie = 0;
    const UInt32 intrId = ISS_TIMESTAMP_IRQ1_INTR_ID;

    / Disabling the global interrupts /
    cookie = Hwi_disable();

    BspOsal_irqXbarConnect(ISS_TIMESTAMP_IRQ1_XBAR_ID, ISS_TIMESTAMP_IRQ1_SRC);

    Vps_printf(" UTILS: TIMER OVF INTERRUPT: HWI Create for INT%d !!!\n", intrId);

    issTimestampContext.hwiIrq1 = BspOsal_registerIntr(intrId,
    (BspOsal_IntrFuncPtr)IssTimestamp_irqIsr,
    NULL);

    //Intc_IntPrioritySet(intrId, 0, 0);

    if (NULL == issTimestampContext.hwiIrq1)
    {
    Vps_printf(" UTILS: TIMER OVF INTERRUPT: HWI Create Failed !!!\n");
    status = SYSTEM_LINK_STATUS_EFAIL;
    }

    / Enable the interrupt /
    Hwi_enableInterrupt(intrId);

    / Restore interrupts /
    Hwi_restore(cookie);

    return status;
    }

    static Void IssTimestamp_irqIsr(UArg ctx)
    {
    uint32_t key;

    key = Hwi_disable();

    // Do something!

    Hwi_restore;

    GPIOPinIntClear(ISS_TIMESTAMP_IRQ1_BASE, GPIO_INT_LINE_1, ISS_TIMESTAMP_IRQ1_PIN);

    }

    Best regards,

    Stefan.

  • Rishabh,

    I have other question, probably related with this problem.

    I'm able to configure GPIO interrupt for GPIO4_4 (Pin E2 -> vin2a_d3) and ISR is activated properly, but I'm not able to do same thing for GPIO4_12 (Pin F4 -> vin2a_d11).

    Is there some explanation for this?

    Best regards,

    Stefan.

  • Hi Stefan,

    I can only think of two things: pin mux and different interrupt configuration (bits are different).

    I will review the interrupt code and get back to you tomorrow.

    Regards,

    Rishabh

  • Rishabh,

    Problem with interrupt on GPIO4_12  is resolved, the GPIO debouncing time was too high.

    Second problem, related to two different GPIO interrupts is resolved by using two different interrupt lines.

    My last question is - Is this really possible to handle two different GPIO interrupts when using one interrupt line? 

    Regards,

    Stefan.

  • Hi Stefan,

    Thanks for the update.

    My suggestion would be to use two different interrupt lines for two pins.

    Regards,

    Rishabh