Part Number: TDA2P-ACD
Hi
We are using PWM module to generate 60 Hz signal. Same signal is routed back to TDA.
Further, we are using GPIO interrupt (GPIO_4) for detecting rising edge of PWM. Inside ISR we are time-stamping
this event. So, difference between two consecutive interrupts should be 16 667 us. But, in our case, time difference is
always very close to 16 000 us or 17 000 us. For example, if we change PWM signal to 50 Hz 100 Hz, or any frequency which
period is rounded to 1 ms (eg. 20 ms or 10 ms) time-stamp is very precise. So, our conclusion that this could be related
to GPIO interrupt latency and GPIO clock. Is this correct? What is clock frequency used for GPIO_4 and is it possible to change it.
Please, give us some hint, our customer is waiting for replay.
Time-stamp function returns time in micro seconds.
Best regards,
Stefan.