• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 99 subscribers
  • Views 496 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRA829 Ethernet switch handover from r5 to CortexAx

Colombo Carlo
Mastermind 25165 points

Hi everybody,

I must reply on ethernet switch as fast as I can .

so I start communication when booting  with R5  controlling the switch and than need to handover to A72  and ideally would like the process to be as fast as possible and as easy as possible .

how can I implement the handover :

- do I need to reset the switch ?

- can I send an interrupt/signal to R5 so to leave control to main CortexA ? 

- can I simply pass  DMA  area  where data are  so to switch from  one to the other core ?  

any suggestion /idea ?

thank you 

best regards

Carlo

  • 0
    TI__Mastermind 27743 points

    Hello Carlo,

    The switch control would never be passed to A72. Switch R5 would always run Ethernet switch firmware which will sync and manage switch for the other cores.

    In your case, as A72 needs to receive data from switch, the Ethernet driver (virtual net dev) can start immediately after boot up and ask switch R5 to map traffic it want to receive via IPC. This (IPC) would be taken care by the driver internally and user just need to enable driver via device tree.

    This doesn't need any resetting of switch or data sharing.

    Regards,

    Prasad 

  • 0 in reply to Prasad Jondhale
    TI__Mastermind 25165 points

    Hi Prasad  ,

    thank you for fast response .

    so if I well understood   :

    --> if  R5 ( safety island )  start controlling the switch it must keep  the control and you ask to receive data to IPC for othe processors : am I right ?

    --> if  I reset the switch via SW , can I give new direct  control to cortexA processor  or  main domain R5 ?    this to avoid IPC in the middle ...

    best regards

    Carlo

  • 0 in reply to Colombo Carlo
    TI__Mastermind 27743 points

    Hello Carlo,

    --> if  R5 ( safety island )  start controlling the switch it must keep  the control and you ask to receive data to IPC for othe processors : am I right ?

    Data is independent and direct via DMA. Only flow registration (CPSW9G configuration) is done via IPC to the EthFw R5 (main domain)

    --> if  I reset the switch via SW , can I give new direct  control to cortexA processor  or  main domain R5 ?    this to avoid IPC in the middle ..

    As pointed earlier, for data no IPC is required.