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AM5728: UART configuration in RTOS

Part Number: AM5728

Hi,

Processor: AM5728

PDK: 

I'm wroking on RTOS project. I need to use UART3, 4, 5 ,6 ,7 ,8 ,9 and 10 in my project. Bu i have some issues with some uarts. My clock and pinmux configuration show below:

CLOCK CONFIGURATION:

// UART3
CSL_FINST(l4PerCmReg->CM_L4PER_UART3_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_MODULEMODE, ENABLE);

while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(l4PerCmReg->CM_L4PER_UART3_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_IDLEST));

// UART4
CSL_FINST(l4PerCmReg->CM_L4PER_UART4_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART4_CLKCTRL_REG_MODULEMODE, ENABLE);

while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART4_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(l4PerCmReg->CM_L4PER_UART4_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART4_CLKCTRL_REG_IDLEST));

// UART5
CSL_FINST(l4PerCmReg->CM_L4PER_UART5_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART5_CLKCTRL_REG_MODULEMODE, ENABLE);

while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART5_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(l4PerCmReg->CM_L4PER_UART5_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART5_CLKCTRL_REG_IDLEST));

// UART6
CSL_FINST(ipuCmReg->CM_IPU_UART6_CLKCTRL_REG,
IPU_CM_CORE_AON_CM_IPU_UART6_CLKCTRL_REG_MODULEMODE, ENABLE);

while(CSL_IPU_CM_CORE_AON_CM_IPU_UART6_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(ipuCmReg->CM_IPU_UART6_CLKCTRL_REG,
IPU_CM_CORE_AON_CM_IPU_UART6_CLKCTRL_REG_IDLEST));

// UART7
CSL_FINST(l4PerCmReg->CM_L4PER2_UART7_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART7_CLKCTRL_REG_MODULEMODE, ENABLE);

while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART7_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(l4PerCmReg->CM_L4PER2_UART7_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART7_CLKCTRL_REG_IDLEST));

// UART8

CSL_FINST(l4PerCmReg->CM_L4PER2_UART8_CLKCTRL_REG,

L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART8_CLKCTRL_REG_MODULEMODE, ENABLE);

while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART8_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(l4PerCmReg->CM_L4PER2_UART8_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART8_CLKCTRL_REG_IDLEST));

// UART9
CSL_FINST(l4PerCmReg->CM_L4PER2_UART9_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART9_CLKCTRL_REG_MODULEMODE, ENABLE);

while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART9_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(l4PerCmReg->CM_L4PER2_UART9_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART9_CLKCTRL_REG_IDLEST));

// UART10
CSL_FINST(wkupAonCmReg->CM_WKUPAON_UART10_CLKCTRL_REG,
WKUPAON_CM_CM_WKUPAON_UART10_CLKCTRL_REG_MODULEMODE, ENABLE);

while(CSL_WKUPAON_CM_CM_WKUPAON_UART10_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(wkupAonCmReg->CM_WKUPAON_UART10_CLKCTRL_REG,
WKUPAON_CM_CM_WKUPAON_UART10_CLKCTRL_REG_IDLEST));

PINMUX CONFIGURATION:

/* UART3 - uart3_rxd on V2 - X_UART3 */
{0x1648, 0xE0000, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART3 - uart3_txd on Y1 - X_UART3 */
{0x164C, 0x90000, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART3 - uart3_ctsn on G17 - X_UART3 */
{0x17C8, 0xE0001, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART3 - uart3_rtsn on B24 - X_UART3 */
{0x17CC, 0x90001, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART5 - uart5_rxd on F11 - X_UART5 */
{0x15DC, 0x60002, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART5 - uart5_txd on G10 - X_UART5 */
{0x15E0, 0x10002, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART4 - uart4_rxd on G16 - Y_UART4 */
{0x173C, 0x50004, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART4 - uart4_txd on D17 - Y_UART4 */
{0x1740, 0x10004, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART6 - uart6_rxd on E8 - Y_UART6 */
{0x15FC, 0x60002, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART6 - uart6_txd on D9 - Y_UART6 */
{0x1600, 0x10002, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART7 - uart7_rxd on B7 - Y_UART7 */
{0x161C, 0x50002, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART7 - uart7_txd on B8 - Y_UART7 */
{0x1620, 0x10002, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART8 - uart8_rxd on C18 - Y_UART8 */
{0x1734, 0x50003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART8 - uart8_txd on A21 - Y_UART8 */
{0x1738, 0x10003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART9 - uart9_rxd on AA3 - Y_UART9 */
{0x1744, 0x50003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART9 - uart9_txd on AB9 - Y_UART9 */
{0x1748, 0x10003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART10 - uart10_rxd on D1 - Y_UART10 */
{0x1570, 0x60008, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

/* UART10 - uart10_txd on E2 - Y_UART10 */
{0x1574, 0x10008, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

UART5, UART6, UART3 and UART10 working properly but UART4, UART9, UART7 and UART8 not working. 

UART_Open, command return ok but UART_write do noting.

Can you check my configuration settings. Where was my mistakes??

Thanks.

Metin Sunan

  • Hi Metin,

    Do you use AM57x PSDK RTOS v6.00?

    Do you use AM57x TI board (EVM, IDK) or custom board?

    Can you dump below registers value and report what value you have there?

    CM_L4PER_UART5_CLKCTRL/0x4A009870

    CM_L4PER_UART4_CLKCTRL/0x4A009858

    Regards,
    Pavel

  • Are you configuring UART in interrupt mode or in polling mode or in DMA mode? Default mode may be interrupt/DMA so you need to make sure that the crossbar setup. Also, I noticed that UART7-UART10 interrupt are all routed to 104 interrupt number in UART_soc.c file because they are not default mapped in MPU_INTC so you need to perform appropriate crossbar configuration 

    Crossbar setup is explained in the TRM and the software configuration with example is provided here:

    http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_how_to_guides.html?highlight=crossbar#how-to-configure-crossbar-when-setting-up-interrupts-on-dra7xx-tda2xx-am57xx

    Regards,

    Rahul 

  • Hi Pavel,

    I use the SDK RTOS v05.01.00.11 on custom board.  I dumped registers which your request :

    CM_L4PER_UART5_CLKCTRL/0x4A009870 --> 0x2

    CM_L4PER_UART4_CLKCTRL/0x4A009858 --> 0x2

    and i have also read pther UART's CLKCTRL registers. All of them are 0x2. I think this values seem normal.  Problem there may be pinmux values.

    Thanks.

    Metin

  • Hi Rahul,

    Thank you for suggestions about to interrupt configurations. I've reviewed the UART_Soc file before. I've seen some definitions here for each UART. I seem UART7-10 interrupts same. I changed the interrupts according to the free interrupts shown in TRM and recompiled with "make board". I defined interrupts as below:

    UART7 interrupt = 114

    UART8 interrupt = 115

    UART9 interrupt = 116

    UART10 interrupt = 117

    I want to inform you about my uart initialization codes. I have writed a function like the following to use UARTs. Each uart is opened with the same function:

    // SIO->Serial Input Output struct

    // UART-> This struct include hadle, instance number, tx and rx buffers, indexs etc.

    typedef struct 
    {
    uint8_t SIO_Number;
    UART *Uart;
    void *TxDevice;
    void *RxDevice;
    } SIO;

    ...

    ...

    uint8_t SIO_Open (SIO sio, UART_Callback rcb, UART_Callback wcb)
    {
    UART_HwAttrs uart_cfg;
    UART_Params uart_params;

    UART_socGetInitCfg(sio.Uart->Instance, &uart_cfg);

    uart_cfg.edmaHandle = NULL;
    uart_cfg.dmaMode = FALSE;
    uart_cfg.loopback = FALSE;
    uart_cfg.enableInterrupt= TRUE;
    UART_socSetInitCfg(sio.Uart->Instance, &uart_cfg);

    UART_Params_init(&uart_params);
    uart_params.baudRate= sio.Uart->Baud;
    uart_params.dataLength= UART_LEN_8;
    uart_params.parityType= UART_PAR_NONE;
    uart_params.stopBits= UART_STOP_ONE;

    uart_params.readMode = UART_MODE_CALLBACK;
    uart_params.readDataMode = UART_DATA_BINARY;
    uart_params.readReturnMode = UART_RETURN_FULL;
    uart_params.readCallback = rcb;
    uart_params.readEcho= UART_ECHO_OFF;
    uart_params.readTimeout= SemaphoreP_WAIT_FOREVER;

    uart_params.writeMode= UART_MODE_CALLBACK;
    uart_params.writeDataMode= UART_DATA_BINARY;
    uart_params.writeCallback = wcb;
    uart_params.writeTimeout= SemaphoreP_WAIT_FOREVER;

    // CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_MPU, CSL_XBAR_INST_MPU_IRQ_105, CSL_XBAR_UART5_IRQ);

    sio.Uart->RxBuffer_In= 0;
    sio.Uart->RxBuffer_Out= 0;
    sio.Uart->RxBuffer_Cnt= 0;
    sio.Uart->RxEOL_cnt= 2;
    sio.Uart->RxEOL_ind= 0;
    sio.Uart->RxEOL_ind2= 0;
    sio.Uart->RxEOL [0]= CR;
    sio.Uart->RxEOL [1]= LF;
    sio.Uart->RxSentences_In= 0;
    sio.Uart->RxSentences_Out= 0;

    sio.Uart->TxSentences_In= 0;
    sio.Uart->TxSentences_Out= 0;

    sio.Uart->Handle= UART_open(sio.Uart->Instance, &uart_params);

    //UART_read(Handle5,UART5_RxBuffer_incoming,1);

    return 1;

    }

    ......

    I called SIO_open function as bellow:

    ....

    ....

    // SIO1 (UART5)
    SIO1.SIO_Number= 1;
    SIO1.Uart= &SIO1_UART;  // This struct include hadle, instance number, tx and rx buffers, indexs etc.
    SIO1.Uart->Baud= 115200;
    SIO_Open (SIO1, &SIO1_ReadCallback, &SIO1_WriteCallback);

    ....

    ....

    I think the UART_open function defines the interrupt crossbar using the interrupt number defined in the UART_soc file. Because callback functions worked without any crossbar command. I tryed send and receive data on UART5, with/without "CSL_xbarIrqConfigure" command. UART5 each time worked.

    Do you think I should add the CSL_xbarIrqConfigure command for each UART?

    Are some UARTs not working because there are errors in the Interrupt?

    I've seen that the output pins of non-working UARTs are Low, the others are High. Which setting am I wrong? Is it pinmux?

    Thanks

    Metin

  • Hi Rahul,

    I solved the my issue. I rewritten the PAD Config registers with HW_WR_REG32 to directly, the problem is resolved. All uart ports working now. There was probably a problem with the PDK that I used. 

    The link you submitted in the previous post showed how to make the crossbar definitions in the CFG file. I use serial port interrupts but I did not define these functions as HWI in CFG. Does this cause any problems?

    Pavel, Rahul thanks for your supports. I solved with your helps.

    Metin

  • Metin,

    Thanks for the update. Please mark the issue as resolved if you have the setup working. 

    A word of caution, the PINMUX/PAD config register initialization on these devices is recommended to be done from OCMC memory and not DDR due to risk of glitching issues involved with this device while performing IO configuration from DDR memory.

    http://www.ti.com/lit/an/sprac44a/sprac44a.pdf (Read Section 1.2.1)

    Due to critical nature of this recommendation, we also spike this out in the software documentation.

    http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_board.html#application-integration-for-am5x-dra7xx

    Regards,

    Rahul