TDA3XEVM: Nand gpmc driver supports 4bit BCH ECC algorithm

Hi Prakash ,

can you just clarify which processor and SDK you use - your question seems related to Linux, but device is TDA3 which do not support Linux?

Thanks,

Yordan

Hi ,

We are working on vision SDK right  on TDA3X , We are porting the NAND driver  to vision sdk  by looking into the linux driver nand-gpmc. That's why we have come up with some questions.

Regards

Prakash

Hi Prakash,

Can you tell me which Vision SDK version you are working with, as well as the NAND part you are using?

It sounds like you're using NAND with on-die ECC, which is supported by kernel. I'm checking what kind of configuration may be needed for this sort of setup.

Do you have a preference for what ECC strength you want to target?

As far as timings go, you can use our EVM and the SDK timings as an example and try to fine tune from there for better performance.

https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt

Thanks,

David

Hi David,

The below is the nand part number

http://www.issi.com/WW/pdf/34-35MW02G084-164.pdf

we are using Vision_sdk3.7 version, The vison sdk doesn't have NAND driver. But it had the driver for qspi & NOR flash.  So our main aim is to place SBL code in QSPI and placing application image on NAND.  By doing customization in SBL, the application will take from NAND.

We just integrated the NAND driver from Am335 pdk to vision sdk. I noticed the code in nand driver which says NAND BCH 4Bit not support.  

Hi Prakash,

I don't believe you should need to run software ECC if you're enabling hardware ECC, though I may be wrong. I'm double checking with Vision SDK experts on kernel support for this.

Just double checking, your need is for Linux support of NAND fs?

Thanks,

David

Hi David,

we are not using linux on TDA3X , we are taking linux driver as reference to integrate to vision sdk 3.7 version.

For you reference,

http://www.ti.com/tool/PROCESSOR-SDK-TDAX

This is the SDK we are using in TDA3X,

Regards

prakash

Hi David,

Now I Understood the difference between on-die ECC and hardware ECC, what happened if ECC is enabled on both  On-die and hardware? it will create any problems.

1) Is on-die nand  ECC is enabled by default, or we have to set the feature using commands. 

Regards

Prakash

Hi Prakash,

You should not enable both on-die and hardware ECC at the same time.

Can I check with you what kernel version you're currently using as reference?

Also, is this a new design? And can you explain why you chose NAND for your application image?

I'm checking if we know whether most NAND parts with ECC have ECC enabled by default or not, but this sounds like something to check with your NAND vendor.

Thanks,

David