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# TMS320DM6437Q: The power consumption comparison for tms320dm6437Q5 between CVDD=1.2V and CVDD=1.05V

Part Number: TMS320DM6437Q

Hi Expert,

in datasheet of tms320dm6437Q5 , internal core voltage can be either 1.2V  or 1.05V, I made use of spreadsheet(see it in attachment) downloaded from TI website to compare the power consumption, it's interesting that

when the DSP frequency is 400MHZ,

the power consumption for CVDD=1.2V: 925mW

the power consumption for CVDD=1.05V: 653mW

so the gap of two configurations is very big: 925mW-653mW= 272 mW,

are you sure the gap is reasonable?

consider lower power consumption, now tms320dm6437Q5 is supplied by 1.2V, if it's supplied by 1.05V, the only change is to change the CVDD from 1.2V to 1.05V, right? is there other changes to be done?

by the way, is TMS320DM6437ZWTQ5 pin to pin for TMS320DM6437ZWTQ6? if iTMS320DM6437ZWTQ6 is replaced by TMS320DM6437ZWTQ5, is there any changes to be done?

• Hi Rob,

Rob Jason said:

when the DSP frequency is 400MHZ,

the power consumption for CVDD=1.2V: 925mW

the power consumption for CVDD=1.05V: 653mW

so the gap of two configurations is very big: 925mW-653mW= 272 mW,

are you sure the gap is reasonable?

As this spreadsheet is based on real power measurement of DM64x EVM board, I think this should be correct.

Rob Jason said:
consider lower power consumption, now tms320dm6437Q5 is supplied by 1.2V, if it's supplied by 1.05V, the only change is to change the CVDD from 1.2V to 1.05V, right? is there other changes to be done?

You can also reduce DSP frequency with PLL1 divider or put DSP to Idle or Disable (depending on your use case), thus you will have even low power consumption. You can also disable all modules (i.e. Timer0, I2C, etc) you do not need.

Rob Jason said:
by the way, is TMS320DM6437ZWTQ5 pin to pin for TMS320DM6437ZWTQ6? if iTMS320DM6437ZWTQ6 is replaced by TMS320DM6437ZWTQ5, is there any changes to be done?

Yes.

Only change DSP frequency from 660MHz to 500MHz. You can also use your Q5 device with lower frequency, 500MHz is the maximum.

Regards,
Pavel

• Hi Pavel,

thanks for your reply, for your answer below, my application is  that DSP should always operate for image algorithm, based on the power consumption spreadsheet, it seems that it's more lower consumption if internal core voltage is 1.05V compared to lower frequency by PLL divider, another question :

is the maximum DSP frequency 400Mhz if internal core voltage is 1.05V,right?

You can also reduce DSP frequency with PLL1 divider or put DSP to Idle or Disable (depending on your use case), thus you will have even low power consumption. You can also disable all modules (i.e. Timer0, I2C, etc) you do not need.

• Rob Jason said:
is the maximum DSP frequency 400Mhz if internal core voltage is 1.05V,right?

Yes.

Refer to DM643x datasheet

5.2 Recommended Operating Conditions

Table 6-15. PLLC1 Clock Frequency Ranges

Regards,
Pavel