i want start MPU2 to protect DDR2 momery (0xc0000000~0xc5FFFFFF), The 96M DDR2 memory are used VxWorks Momory, I tyr to prevent DSP to write DDR2 memory ,The MPU2 set are listed ,but DSP remain can write DDR2 MeMory (0xc0000000~0xc5FFFFFF),
//-----------------------------------------------------------------------------
//MPU2 contrl register
//-----------------------------------------------------------------------------
#define DSP_IENSTAT *(unsigned int*)(0x01E15014) //Interrupt enable status/clear register
#define DSP_IENSET *(unsigned int*)(0x01E15018) //Interrupt enable set register 0x03
#define DSP_IENCLR *(unsigned int*)(0x01E1501C) //Interrupt enable clear register
#define DSP_PROG1_MPSAR *(unsigned int*)(0x01E15200) //Programmable range 1 start address register
#define DSP_PROG1_MPEAR *(unsigned int*)(0x01E15204) //Programmable range 1 end address register
#define DSP_PROG1_MPPA *(unsigned int*)(0x01E15208) //Programmable range 1 memory protection page attributes register
#define DSP_PROG2_MPSAR *(unsigned int*)(0x01E15210) //PROG2_MPSAR Programmable range 2 start address register
#define DSP_PROG2_MPEAR *(unsigned int*)(0x01E15214) //PROG2_MPEAR Programmable range 2 end address register
#define DSP_PROG2_MPPA *(unsigned int*)(0x01E15218) //PROG2_MPPA Programmable range 2 memory protection page attributes register
#define DSP_FLTADDRR *(unsigned int*)(0x01E15300) //Fault address register Section 6.3.13
#define DSP_FLTSTAT *(unsigned int*)(0x01E15304) //Fault status register Section 6.3.14
#define DSP_FLTCLR *(unsigned int*)(0x01E15308) //Fault clear register Section 6.3.15
/**========================================================**/
/** 函数名称：Setup_MPU2
@brief：启动MPU2的内存保护 .
**========================================================**/
void Setup_MPU2(void)
{
DSP_IENSET = 0x03; //enable an interrupt.
DSP_PROG1_MPSAR = 0xc0000000; // DDR 的前96M VxWorks使用
DSP_PROG1_MPEAR = 0xc000ffff; //
DSP_PROG1_MPPA = 0x004FF; //bit6 bit7 must write 1
DSP_PROG2_MPSAR = 0xc8000000; //DDR 的没有配置的128M，也需要保护
DSP_PROG2_MPEAR = 0xDFFFFFFF; //
DSP_PROG2_MPPA = 0xC0; //bit6 bit7 must write 1
DSP_FLTCLR = 0x01; //故障状态CLR
}
