[DRA829] DDR0_RESETn signal

Hi KORO,

This pin is typically driven by DDR controller actively as soon as power has ramped up, therefore no need for external pullup/down.

However, DRA829 has a new upgraded DDR controller and I need to double check.

Regards,

Stan

Hello Stan-san

Thanks a lot.

I am waiting for you to update.

Br

KORO

KORO-san,

I understood why a pullup can be seen in some designs and in some not. A pullup is required if Suspend-to-RAM low-power mode has to be supported in your design. This is because in Suspend2RAM, SoC will power off, and DDR is in self-refresh, preserving contents. DDR's RESET pin still needs to be driven high in that mode.

- If Suspend to RAM is not needed - pullup is not needed

- If Suspend to RAM is needed - pullup, or other mechanism to drive RESET high is needed. Note that in this case there also other requirements, for other pins of DDR.

Regards,

Stan

Stan-san

I got it.

Thanks a lot for your quick reply.

It is very helpful for us.

Br

KORO