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Multiplexing DM355 video inputs

rodiovanni
Prodigy 130 points
Other Parts Discussed in Thread: THS8200

Hello everybody,

I have a question related to the DM355 device. I would like to multiplex 4 different video input on the DM355 video port and I would like to know what is the max frame size of the 4 video in that can be adopted and the related frame rate. In fact in the document

   http://focus.ti.com/download/tidc/pdfs/asia/2008/tw_T1_5_Robert_Chen_resized.pdf

the authors talk about 4 FULL D1 but they don't mention the frame rate achieved.

Is there some one that can provide me some detail?

Thanks a lot

Giovanni

  • TI__Mastermind 37340 points

    The presentation seems to suggest 4 D1 channels at 30 frames per second each.  I can see this being totally possible as DM355 has 75 MHz pixel clock (limitation).

    720x480 D1 frame  x  4 channels x 30 fps = 41.5 MHz < 75 MHz limitation.

  • in reply to Juan Gonzales
    Prodigy 130 points

    Well you are right, me too I did the calculation about pixel clock, but I don't know if computational power suffices, since num of pixel of 4 FULL D1 > num of pixel of a 720p.

    Therefore, this is my primary doubt.

    Thanks for your kind reply.

    Gio

  • in reply to rodiovanni
    TI__Mastermind 41665 points

    From a codec perspective, if you look in the MPEG4 encoder datasheet in dvsdk_1_30_01_41\dm355_codecs_1_12_003\packages\ti\sdo\codecs\mpeg4enc\dm355\docs\SPRS488.pdf it shows that a MJCP (accelerator) load of 6.733 ms/frame for D1, which means at 30fps a single D1 stream will use about 6.733 * 30 = 202 mS per second of MJCP processing time or about 20% loading (this assumes the low quality/highest performance mode from table 6). Assuming your system implementation does not introduce too much overhead you should be able to encode four D1 video inputs simultaneously.

  • in reply to rodiovanni
    TI__Mastermind 37340 points

    rodiovanni said:

    Well you are right, me too I did the calculation about pixel clock, but I don't know if computational power suffices, since num of pixel of 4 FULL D1 > num of pixel of a 720p.

    FYI, for 720p @ 60 fps (common), you would need a pixel clock of :  1650 x 750 (per SMPTE standards) * 60 fps = 74.25 MHz

    D1 is normally NTSC 30fps.  I forget the exact FULL D1 resolution (I believe is 720x625), but if you keep 30 fps when compared to 720p @ 60 fps, I believe even 4 FULL D1 channels will be less than 75MHz max pixel clock.

     

  • in reply to Bernie Thompson TI
    Prodigy 130 points

    Interesting, well at least I should be able to support 3 stream without problems, the 4th one depends on my specific application, but it could suffice.

    Thanks a lot for your interested in this topic.

    Gio

  • in reply to rodiovanni
    Prodigy 30 points

    Hi all,

    On a related note, i am capturing and streaming 1280x1023 uncompressed video based on the ipipe_720p_demo under mv4.0.1 and dvsdk1.2 but my frame rates are running around 10 fps. i have to do a bayer to ycc in the ipipe and display 16 bit ycc to an interface that looks like the ths8200. Will you please make some recommendations for improving performance? I'm wondering if the raw video bandwidth is my issue? Do i need to optimize my data path for example by limiting the buffers used in the capture,ipipe, and display instead of doing copies? I've reviewed the code and don't see much room for improvement with changing buffering schemes - i'm running on the extended temp dm355 at 216 mhz with mddr at 171 mhz. Thanks.