Hi,
We are experiencing DDR3 leveling problems with Keystone II SoC 66AK2H14.
DDR3 is DDR3-1600 JEDEC speed grade. DDR3 clock is configured to 800Mhz.
These leveling problems prevent our board to correctly boot up at 800Mhz. u-boot memory POST detect DDR memory failures and aborts.
If DDR3 clock is configured at 700Mhz, DDR3 operation is successfull.
PGSR0, DXnGSR0 and DXnGSR2 registers indicate that leveling is done and no errors occured.
Printing DXnLCDL0, DXnLCDLR1 and DXnLCDLR2 registers after DDR3 initialization at each boot of the board shows that for some lanes, R0DQSGD parameter has values which are quite different from one boot to another.
See attached excel file.
The Column on top has either green or red. Greens were successful boots and reds obviously not okay.In conclusion lane 7 R0DQSGD is the one which has most errors (in all of the cases where boot was not successful) but also lane 4 has some errors.The min and max rows on right from data is a good indicator if there was something “fishy” with the leveling values.
We would appreciate any help on how to go on further with debugging this issue.
Best regards.
