AM5728: GPIO usage

user4516679

Part Number: AM5728
Other Parts Discussed in Thread: BEAGLEBOARD-X15, , PMP

We encountered a problem：

We want to boot from MMC 1 and use the GPIO7 and GPIO1 pins as normal GPIOs. Since we want the GPIO's initial state to be high, we have added pull-up resistance for them.

I modify dts as follows：

buttons_pins_default: buttons_pins_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x353c, PIN_INPUT_PULLUP | MUX_MODE14) /* vin1a_d18.gpio3_22 (AE5) */
DRA7XX_CORE_IOPAD(0x3540, PIN_INPUT_PULLUP | MUX_MODE14) /* vin1a_d19.gpio3_23 (AE1) */
DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_18*/
DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_19 */
DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_28 */
DRA7XX_CORE_IOPAD(0x342C, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_29 */
DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_18 */
DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_19 */
DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_20 */
>;
};

Fullscreen 2158.am572x-idk.dts.txt Download

/*
 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/dts-v1/;

#include "dra74x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
#include "am57xx-idk-common.dtsi"
#include "dra74x-mmc-iodelay.dtsi"

/ {
	model = "TI AM5728 IDK";
	compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74",
		     "ti,dra7";

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x80000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		ipu2_cma_pool: ipu2_cma@95800000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x95800000 0x0 0x3800000>;
			reusable;
			status = "okay";
		};

		dsp1_cma_pool: dsp1_cma@99000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x99000000 0x0 0x4000000>;
			reusable;
			status = "okay";
		};

		ipu1_cma_pool: ipu1_cma@9d000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9d000000 0x0 0x2000000>;
			reusable;
			status = "okay";
		};

		dsp2_cma_pool: dsp2_cma@9f000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9f000000 0x0 0x800000>;
			reusable;
			status = "okay";
		};
	};

	pwm_timer16: dmtimer-pwm@16 {
		pinctrl-names = "default";
		pinctrl-0 = <&fan_pins_default>;
		compatible = "ti,omap-dmtimer-pwm";
		ti,timers = <&timer16>;
		#pwm-cells = <3>;
		ti,prescaler = <7>;
		ti,clock-source = <0x00>;
	};

	pwm_fan: pwm_fan {
		compatible = "pwm-fan";
		cooling-min-state = <0>;
		cooling-max-state = <3>;
		#cooling-cells = <2>;
		pwms = <&pwm_timer16 0 10000 0>;
		cooling-levels = <102 153 204 250>;
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap0 0 50000 0>;

		brightness-levels = <0 10 50 100 150 200 220 240 255>;

		default-brightness-level = <8>;
	};

};

&dra7_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <&leds_pins_default>;

	leds_pins_default: leds_pins_default {
		pinctrl-single,pins = <
			DRA7XX_CORE_IOPAD(0x37a4, PIN_OUTPUT | MUX_MODE14) /* spi1_sclk.gpio7_7 (som led1) */
			DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 (som led2) */
			DRA7XX_CORE_IOPAD(0x34e8, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio3_1 */
			DRA7XX_CORE_IOPAD(0x34ec, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio3_2 */
			DRA7XX_CORE_IOPAD(0x34f0, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio3_3 */			
			DRA7XX_CORE_IOPAD(0x3530, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio3_19 */
			DRA7XX_CORE_IOPAD(0x3534, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio3_20 */
			DRA7XX_CORE_IOPAD(0x3538, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio3_21 */
                              DRA7XX_CORE_IOPAD(0x353c, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio3_22 */
			DRA7XX_CORE_IOPAD(0x3540, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio3_23 */
  			DRA7XX_CORE_IOPAD(0x3548, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio3_25 */
                              DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_18*/
                              DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_19  */
                              DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_28  */
                              DRA7XX_CORE_IOPAD(0x342C, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_29  */
                              DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_18  */
                              DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_19  */
                              DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_20  */
		>;
	};

	buttons_pins_default: buttons_pins_default {
		pinctrl-single,pins = <
			DRA7XX_CORE_IOPAD(0x353c, PIN_INPUT_PULLUP | MUX_MODE14) /* vin1a_d18.gpio3_22 (AE5) */
			DRA7XX_CORE_IOPAD(0x3540, PIN_INPUT_PULLUP | MUX_MODE14) /* vin1a_d19.gpio3_23 (AE1) */
                            DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_18*/
                            DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_19  */
                            DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_28  */
                            DRA7XX_CORE_IOPAD(0x342C, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_29  */
                            DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_18  */
                            DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_19  */
                            DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_20  */
		>;
	};

	fan_pins_default: fan_pins_default {
		pinctrl-single,pins = <
			DRA7XX_CORE_IOPAD(0x34e4, (PIN_OUTPUT_PULLUP | MUX_MODE7)) /* vin1a_de0.timer16 (AD9) */
		>;
	};

	ehrpwm0_pins: ehrpwm0_pins {
		pinctrl-single,pins = <
			DRA7XX_CORE_IOPAD(0x3500, (PIN_OUTPUT | MUX_MODE10)) /* vin1a_d3.eCAP1_in_PWM1_out (AH6) */
		>;
	};

	tvp5158_reset_pins: tvp5158_reset_pins {
		pinctrl-single,pins = <
			DRA7XX_CORE_IOPAD(0x34e0, (PIN_OUTPUT_PULLUP | MUX_MODE14)) /* vin1b_clk1.gpio2_31 (AH7) */
		>;
	};
};

&mmc1 {
	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
	pinctrl-0 = <&mmc1_pins_default>;
/*
	pinctrl-1 = <&mmc1_pins_hs>;
	pinctrl-2 = <&mmc1_pins_sdr12>;
	pinctrl-3 = <&mmc1_pins_sdr25>;
	pinctrl-4 = <&mmc1_pins_sdr50>;
	pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
*/
};

&mmc2 {
	pinctrl-names = "default", "hs", "ddr_1_8v";
	pinctrl-0 = <&mmc2_pins_default>;
	pinctrl-1 = <&mmc2_pins_hs>;
	pinctrl-2 = <&mmc2_pins_ddr_rev20>;
};

&omap_dwc3_2 {
	extcon = <&extcon_usb2>;
};

&extcon_usb2 {
	id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
	vbus-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
};

/*
&sn65hvs882 {
	load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
};*/

&cpu0 {
	vdd-supply = <&smps12_reg>;
};

&cpu_trips {
	cpu_alert1: cpu_alert1 {
		temperature = <50000>; /* millicelsius */
		hysteresis = <2000>; /* millicelsius */
		type = "active";
	};
};

&cpu_cooling_maps {
	map1 {
		trip = <&cpu_alert1>;
		cooling-device = <&pwm_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
	};
};

&thermal_zones {
	board_thermal: board_thermal {
		polling-delay-passive = <1250>; /* milliseconds */
		polling-delay = <1500>; /* milliseconds */

				/* sensor       ID */
		thermal-sensors = <&tmp102     0>;

		board_trips: trips {
			board_alert0: board_alert {
				temperature = <40000>; /* millicelsius */
				hysteresis = <2000>; /* millicelsius */
				type = "active";
			};

			board_crit: board_crit {
				temperature = <105000>; /* millicelsius */
				hysteresis = <0>; /* millicelsius */
				type = "critical";
			};
		};

		board_cooling_maps: cooling-maps {
			map0 {
				trip = <&board_alert0>;
				cooling-device =
				  <&pwm_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
			};
		};
       };
};

&timer16 {
	ti,timer-pwm;
};

&epwmss0 {
	status = "okay";
};

&ecap0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ehrpwm0_pins>;
};

&i2c4 {
	status = "okay";
	clock-frequency = <100000>;

	tvp5158@5f {
		compatible = "ti,tvp5158";
		pinctrl-names = "default";
		pinctrl-0 = <&tvp5158_reset_pins>;

		reg = <0x5f>;

		port {
			tvp5158_0: endpoint {
				remote-endpoint = <&vin4a>;
				channels = <0 2 4 6>;
			};
		};
	};
};

&vin4a {
	status = "okay";

	endpoint@0 {
		slave-mode;
		remote-endpoint = <&tvp5158_0>;
	};
};

&ov2659_1 {
	remote-endpoint = <&vin4b>;
};

&vin4b {
	status = "okay";

	endpoint@3 {
		slave-mode;
		remote-endpoint = <&ov2659_1>;
	};
};

&vip2 {
	status = "okay";
};

&pcie1_rc {
	status = "okay";
	//gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};

&pcie1_ep {
	//gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};

&mailbox5 {
	status = "okay";
	mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
		status = "okay";
	};
	mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
		status = "okay";
	};
};

&mailbox6 {
	status = "okay";
	mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
		status = "okay";
	};
	mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
		status = "okay";
	};
};

&mmu0_dsp1 {
	status = "okay";
};

&mmu1_dsp1 {
	status = "okay";
};

&mmu0_dsp2 {
	status = "okay";
};

&mmu1_dsp2 {
	status = "okay";
};

&mmu_ipu1 {
	status = "okay";
};

&mmu_ipu2 {
	status = "okay";
};

&ipu2 {
	status = "okay";
	memory-region = <&ipu2_cma_pool>;
	mboxes = <&mailbox6 &mbox_ipu2_ipc3x>;
	timers = <&timer3>;
	watchdog-timers = <&timer4>, <&timer9>;
};

&ipu1 {
	status = "okay";
	memory-region = <&ipu1_cma_pool>;
	mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;
	timers = <&timer11>;
	watchdog-timers = <&timer7>, <&timer8>;
};

&dsp1 {
	status = "okay";
	memory-region = <&dsp1_cma_pool>;
	mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
	timers = <&timer5>;
	watchdog-timers = <&timer10>;
};

&dsp2 {
	status = "okay";
	memory-region = <&dsp2_cma_pool>;
	mboxes = <&mailbox6 &mbox_dsp2_ipc3x>;
	timers = <&timer6>;
	watchdog-timers = <&timer13>;
};

&pruss2_mdio {
	reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>,
		      <&gpio6 13 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;	/* PHY datasheet states 1uS min */
};

#include "am57xx-evm-cmem.dtsi"

But system startup failed when powering up, the erros is:

U-Boot 2016.05-00042-g225a0c6 (Jul 09 2018 - 09:24:27 +0800)

CPU : DRA752-GP ES2.0
Model: TI AM5728 BeagleBoard-X15
Board: AM572x EVM REV A.30
I2C: ready
DRAM: 1 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
** Bad device mmc 1 **
Using default environment

SCSI: SATA link 0 timeout.
AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst
scanning bus for devices...
Found 0 device(s).
Net: wait_for_user_access Timeout
wait_for_user_access Timeout
wait_for_user_access Timeout
wait_for_user_access Timeout
wait_for_user_access Timeout

We check the technical manual to find that the related pins of GPIO7 and GPIO1 have SYSBOOT multiplexing, which will cause the startup failure from MMC1. However, the hardware can not be modified, then
what should we do to ensure that gpio7 and gpio1 are normal gpio (initial state is high) and can be started from mmc1

thanks everyone.

best regards

mql

over 6 years ago

0 Biser Gatchev-XID over 6 years ago

TI__Guru**** 393215 points

Hi,

user4516679 said:
We check the technical manual to find that the related pins of GPIO7 and GPIO1 have SYSBOOT multiplexing, which will cause the startup failure from MMC1

This is not true. SYSBOOT pins are latched at reset release time, while your pinmux settings are applied much later, after U-boot has started. This is entirely a software issue.

0 user4516679 over 6 years ago in reply to Biser Gatchev-XID

Prodigy 110 points

Hi Biser

Thank you for your timely reply.

When the pull-up resistance is removed, the system can start normally. But the initial state of GPIO is low level. We want to use this GPIO as an input, and the external input device requires that the default state of GPIO is high level. Is there any way I can turn it into high level after the system starts?

Thank you very much.

mql

0 Kemal R. Shakir over 6 years ago in reply to user4516679

TI__Guru 55345 points

Hello mql,

You must change the GPIO pinmux settings in <Processor SDK>/board-support/u-boot-<version>/board/ti/am57xx/mux_data.h file.

Best regards,
Kemal

0 user4516679 over 6 years ago in reply to Kemal R. Shakir

Prodigy 110 points

Hi Kemal

Thank you for your timely reply.

Can you give me some examples? I lack experience in uboot.

Best Regards

mql

0 Kemal R. Shakir over 6 years ago in reply to user4516679

TI__Guru 55345 points

For example, for these two pinmuxes

DRA7XX_CORE_IOPAD(0x353c, PIN_INPUT_PULLUP | MUX_MODE14) /* vin1a_d18.gpio3_22 (AE5) */
DRA7XX_CORE_IOPAD(0x3540, PIN_INPUT_PULLUP | MUX_MODE14) /* vin1a_d19.gpio3_23 (AE1) */

add these two lines under core_padconf_array_essential_x15 in <Processor SDK>/board-support/u-boot-<version>/board/ti/am57xx/mux_data.h file

    {VIN1A_D16, (M14 | PIN_INPUT_PULLUP)},   /* vin1a_d16.gpio3_20 */
   {VIN1A_D19, (M14 | PIN_INPUT_PULLUP)},   /* vin1a_d19.gpio3_23 */

for

DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_18*/
DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_19 */
DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_28 */
DRA7XX_CORE_IOPAD(0x342C, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio7_29 */

change

    {GPMC_AD8, (M2 | PIN_INPUT | MANUAL_MODE)},   /* gpmc_ad8.vin3a_d8 */
   {GPMC_AD9, (M2 | PIN_INPUT | MANUAL_MODE)},   /* gpmc_ad9.vin3a_d9 */
    {GPMC_AD10, (M2 | PIN_INPUT | MANUAL_MODE)},   /* gpmc_ad10.vin3a_d10 */
   {GPMC_AD11, (M2 | PIN_INPUT | MANUAL_MODE)},   /* gpmc_ad11.vin3a_d11 */

to

    {GPMC_AD8, (M14 | PIN_INPUT_PULLUP)},   /* gpmc_ad8.gpio7_18 */
   {GPMC_AD9, (M14 | PIN_INPUT_PULLUP)},   /* gpmc_ad9.gpio7_19 */
    {GPMC_AD10, (M14 | PIN_INPUT_PULLUP)},   /* gpmc_ad10.gpio7_28 */
   {GPMC_AD11, (M14 | PIN_INPUT_PULLUP)},   /* gpmc_ad11.gpio7_29 */

for

DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_18 */
DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_19 */
DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT_PULLUP | MUX_MODE14) /* gpio1_20 */

change

    {GPMC_AD12, (M2 | PIN_INPUT | MANUAL_MODE)},   /* gpmc_ad12.vin3a_d12 */
   {GPMC_AD13, (M2 | PIN_INPUT | MANUAL_MODE)},   /* gpmc_ad13.vin3a_d13 */
   {GPMC_AD14, (M2 | PIN_INPUT | MANUAL_MODE)},   /* gpmc_ad14.vin3a_d14 */

to

    {GPMC_AD12, (M14 | PIN_INPUT_PULLUP)},   /* gpmc_ad12.gpio1_18 */
   {GPMC_AD13, (M14 | PIN_INPUT_PULLUP)},   /* gpmc_ad13.gpio1_19 */
   {GPMC_AD14, (M14 | PIN_INPUT_PULLUP)},   /* gpmc_ad14.gpio1_20 */

0 user4516679 over 6 years ago in reply to Kemal R. Shakir

Prodigy 110 points

Hi Kemal

Thank you for your timely reply.

The steps I performed are as follows

1、Modify <Processor SDK>/board-support/u-boot-<version>/board/ti/am57xx/mux_data.h

2、Execute the command in the uboot path

make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm am57xx_evm_defconfig all

3、 Replace MLO and uboot.img of /run/media/mmcblk1p1

It is right?

Best Regards

mql

0 Kemal R. Shakir over 6 years ago in reply to user4516679

TI__Guru 55345 points

Yes.

0 user4516679 over 6 years ago in reply to Kemal R. Shakir

Prodigy 110 points

Hi Kemal

Thank you for your timely reply.

After that steps，I met a problom：

U-Boot SPL 2017.01-00360-g9f4b0ab-dirty (Aug 28 2019 - 19:38:44)
DRA752-GP ES2.0
Trying to boot from MMC2_2
dropping DDR52 mode.
Card did not respond to voltage select!
** Bad device mmc 0 **
Using default environment

reading u-boot.img
reading u-boot.img
reading u-boot.img
No matching DT out of these options:
am57xx-beagle-x15
am57xx-beagle-x15-revb1
am57xx-evm-reva3
am572x-idk
am571x-idk
Card did not respond to voltage select!
** Bad device mmc 0 **
Using default environment

Failed to mount ext2 filesystem...
spl_load_image_ext: ext4fs mount err - 0

What should I do ？

Best Regards

mql

0 Kemal R. Shakir over 6 years ago in reply to user4516679

TI__Guru 55345 points

Please. see this post for this issue.

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AM5728: GPIO usage