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Compiler/TMS320C6657: How do I code for I2C reset ?

user41915
Prodigy 100 points
Part Number: TMS320C6657

Tool/software: TI C/C++ Compiler

I have a trouble of EEPROM handling via I2C.
Sometimes, I get a no STOP CONDITION.
I got a information for soft reset of I2C in sqrugv3.pdf(P2-12).
But I can't understand that how to code for I2C reset.
For example,
    "1. An I2C master must generate up to 9 clock cycles."
I have no idea for generate each clock.

regards,

  • 0
    TI__Guru**** 161600 points

    Hi,

    There is a linux implementation, which you can try to use:
      

    Also check this thread:
     

    Best Regards,
    Yordan

  • 0 in reply to Yordan Kovachev
    Prodigy 100 points

    Hi, Yordan.

    Thank you for your information.
    Now, I'm trying to resolve the issue with your advice.
    My environment is lowest level(not Linux).
    If there is progress, I will contact you again, so please help again.

    Regards,

    M.Hamada.

  • 0 in reply to Yordan Kovachev
    Prodigy 100 points

    Although it was ad hoc, I found that SCL down is generated multiple times, and after the generation of SCL down, the SDA recovery (Low-> High) is occurred.

    I will attach the details of my test environment as follows.

    TMS320C6657 - AT24CM01(I2C-EEPROM)

    From your information that I received, it is not possible to drive SCL independently.

    So, first of all, I was tweaking the control register for independent driving of SCL. And I found when 0xeee9 was written to ICMDR, a single SCL down was monitored (Probed by oscilloscope).

    Then I realized that when this writing is performed multiple times (less than 10 times) while SDA was Low, SDA is recovered (Low-> High).

    For the time being, we plan to operate based on this fact. In other words, using multiple time writing to recover SDA.

    If this method seems to be wrong, it would be helpful to point out.

    Also If there is no problem, I want to close this case.

    Thank you very much.

    Regards,

    M.Hamada