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Original question:

[TDA4M] Data transfer type in UDMA and DRU.

[TDA4M] How different does user do a blok copy using UDMA or DRU?

Yongsig Do
Expert 1690 points
Other Parts Discussed in Thread: TDA4VM

Hello

In pdk/package/ti/drv/udma/examples, there are two exaples to copy between memories called a block copy.

One uses only UDMA, another uses DRU with UDMA.

In case of using DRU, I know UDMA is configured to open and enable channel. Real data is transfered by DRU.

But, i was wondering why user should use a DRU when user wants a block copy. Just faster than UDMA?

So, could you tell me about the advantage of using DRU ?

Best regards,

Yongsig

  • 0
    TI__Mastermind 42515 points

    Hi Yongsig,

    can you check if the document pdk/packages/ti/drv/udma/docs/Migrating_Applications_from_EDMA_to_UDMA_using_TI-RTOS.pdf can give you some clarifications.

    Regards,

    Yordan

  • 0 in reply to Yordan Kamenov
    Expert 1690 points

    Hello, Yordan.

    First of all, Thank you for your reply.

    Actually, I've read all manuals including Migratin~~.pdf, UDMA_overview.pdf and TDA4VM_TRM.pdf files

    But I can't find "advantage" anywhere.

    The only thing that I understand is as follows :

      1. The DRU pically will provide the hightest performance block copy data movement capability of any DMA engine within the SoC.

      2. The DRU does the DMA transfer without the intervention of the UDMA.

    Right?

    But I don't know :

      1. How much faster doew the DRU works than the UDMA on block copy mode.

      2. What advantage the DRU has. as an example, shorter data path than UDMA?

    Please Let me know details about advanteges.

    Best regards

    Yongsig.

  • 0 in reply to Yongsig Do
    TI__Expert 4935 points

    The performance data for DRU and normal UDMA channel is part of SDK documentation "psdk_rtos_auto/docs/user_guide/DATASHEET.html#datasheet_udma".

    In short DRU is used for very high performance transfer and we can say in simple terms that it sits "close" to the MSMC and DDR memory

    Regards

    Sivaraj R

  • 0 in reply to Sivaraj R3681
    Expert 1690 points

    Hello. Sivaraj

    I checked DRU Blockcopy and Min NAVSS Blockcopy on that documentation.

    But, in the first line of the table for DRU block copy,

    it looks like there are Throughput of MCU2 and CPU Load of MCU2.

    From waht I understand, DRU modle is located in only MAIN domain not MCU and WKUP. Right?

    Also, Is a C66x an DSP in previous SoC like tda2x ?

    Best regards.

    Yongsig.

  • 0 in reply to Yongsig Do
    TI__Expert 4935 points

    By design any core can access any peripheral in the system even across domains; there is no restriction as such.

    In order to use DRU (in Main domain) from MCU domain, we use the Main domain NAVSS external channels and route the interrupts to the MCU core. This is taken care by the UDMA driver.

    The only restriction comes from usecase level restriction one want to enforce to achieve safety or MCU only mode etc...

    Yes, C66x is same as TDA2x devices.

    Regards

    Sivaraj R