TMS320C6678: TMS320C6678: Power calculator CVDD consumption

Hi Yordan,

To design the CVDD DC2DC I need to know the estimated Max currents in case of 0.7V and 1.1V Vcore.

I have entered all the conditions for my applications and got 17W or 20A depending on the display mode.

It is specified that the current mode relates to CVDD=0.9V, but I can see that the Wattage to voltage\current is not straight  forward.

Is there a factor to add?

Does the CVDD rail power consumption drops with lower core voltages or does it remains constant, hence

I assume ICVDD max@ 0.7V = 17W/0.7V=24.28A , CVDD max@1.1V = 17W/1.1V=15.45A.

Thanks,

Amir

Amir,

There are two topics that I need to discuss.  The first is the result obtained by your power estimation spreadsheet.  The estimated power consumption is too high.  17W is not a realistic value for the C6678.  The DSP cores can not be operated at the sustained levels that you have estimated.  For most use cases, the C6678 will operate well under 12W under worst-case operational and environmental conditions.  Please attach your spreadsheet for review.  Also, please read the referenced Applications Note to understand realistic values to select.

The second issue is the expected translation from max power in watts to max current in amperes.  Due to the nature of smart reflex, devices that require higher voltage are those that draw less current.  Similarly, devices that draw more current take less voltage.  The process has been tuned for best performance and this results in all parts pulling a smart reflex voltage between 0.9V and 1.1V (with most at the higher end of this range).  Therefore, 0.9V is the correct translation factor from max power to max current so that you can properly size your CVDD power supply.

Tom

Hi Tom,

Regarding the core voltage range: I understand that 0.7V-0.9V is not relevant, and the CVDD DC2DC design should be for 0.9V-1.1V. I will use current @0.9V as max current.

BTW, why not specify this in your design guides?

If as you mentioned most of the devices are close to 1.1V, what are the consequences if a constant 1.1V would be used?

Regarding the power consumption, see attached. 

6678@1250Mhz ~12.5W 

6678@1400Mhz ~16.6W

Thanks,

Amir

Thanks Tom,

Changing all cores to 27% for SP and 0 for CC, reduces the CVDD total power consumption only by 0.5-0.6W.

Amir

Amir,

Please supply your spreadsheet.  There is a mismatch somewhere.  You should not be seeing 15W for a 1250MHz device or 19W for a 1400MHz device.

Tom

Attached

C6678_Power_Consumption_Summary_Rev3_4.xls