DM365 NTSC 480i Composite Video Output bottom white lines

Input CVBS NTSC 480i video signal, no white lines in bottom.

Loopback output of CVBS NTSC 480i video signal from DM365, white lines in bottom:

Is it possible for you to display a black screen with a white 1 pixel border, then a black screen with a 2 pixel border?

I am interested to see if this is an image shift or an image crop.

BR,

Steve

Hi,

I faced similar problem, but there were few white lines at the top of display, using PAL display  output mode.
I chaged file : drivers/media/video/davinci/davinci_platform.c :
function  : static void davinci_enc_set_pal(struct vid_enc_mode_info *mode_info)
from :  davinci_writel((mode_info->upper_margin + 2), (DM365_OSD_REG_BASE + OSD_BASEPY));
to     : davinci_writel((mode_info->upper_margin + 0), (DM365_OSD_REG_BASE + OSD_BASEPY));

static

void davinci_enc_set_ntsc(struct vid_enc_mode_info *mode_info)
IN :
...
.....
} else if (cpu_is_davinci_dm365()) {
davinci_writel(mode_info->upper_margin, (DM365_OSD_REG_BASE + OSD_BASEPY));   

// try decrease upper margin by few pixels like :  davinci_writel(mode_info->upper_margin - 2, (DM365_OSD_REG_BASE + OSD_BASEPY));   

Regards,
Marko. 

yes, i use red color 1 pixel border. it shows border on top, left, and right. bottom are the same white bar...

Steve Clynes said:

Is it possible for you to display a black screen with a white 1 pixel border, then a black screen with a 2 pixel border?

I am interested to see if this is an image shift or an image crop.

BR,

Steve

Thank you for your reply Marko.

For below code, if I increase the upper_margin by 2 pixels, there is white line of 2 pixels on top, the bottom 6 pixels white line is reduced to 4 pixels.

If I decrease the upper_margin by 2 pixels, the top looks ok but the bottom white line becomes 8 pixels.

I have also checked the data capture from capture buffer, the data is correct, there is no white line in the bottom for the captured data. So it looks like the problem is still display or VPBE.

----------------------------------

void davinci_enc_set_ntsc(struct vid_enc_mode_info *mode_info)
IN :
...
.....
} else if (cpu_is_davinci_dm365()) {
davinci_writel(mode_info->upper_margin, (DM365_OSD_REG_BASE + OSD_BASEPY));   

// try decrease upper margin by few pixels like :  davinci_writel(mode_info->upper_margin - 2, (DM365_OSD_REG_BASE + OSD_BASEPY));  

somehow i feel it has some thing to do with bootargs and davincifb...

below is my bootargs (currently using NFS, TFTP boot and fixed IP), default osd0 setting is 720x576 and i change it to 720x480, since i am using NTSC

setenv bootargs mem=70M console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=10.210.3.250:/home/liuhao/workdir/filesys,nolock ip=192.178.1.20 video=davincifb:vid0=OFF:vid1=OFF:osd0=720x480x16,2025K dm365_imp.oper_mode=0

during kernel bootup, some messges seem a bit strange to me:

davincifb davincifb.0: dm_osd0_fb: 720x480x16@0,0 with framebuffer size 2025KB
davincifb davincifb.0: dm_vid0_fb: 0x0x16@0,0 with framebuffer size 1020KB
davincifb davincifb.0: dm_osd1_fb: 720x480x4@0,0 with framebuffer size 675KB
davincifb davincifb.0: dm_vid1_fb: 0x0x16@0,0 with framebuffer size 1020KB

i thought davincifb should skip allocate buffer and configure for vid0 and vid1?

basically the white bar problem has nothing to do with application. the white bar appears on black screen during kernel bootup, seems as soon as davincifb is loaded (but i am really not sure about this).

Does the red top line appear at the very top of the display?

If so, then it looks like the image might be being cropped when it is sent to the display for some reason.

I am not too familiar with the 365's display sub-system programming, so don't know exactly which registers to check to make sure that the driver is setting the heights correctly.

Likewise, I don't know anything about the uimage code, so I will need to defer on that.

I will see if I can find the correct registers to check for you.

BR,

Steve

yes the red top line appear at the very top of the display. it's indeed like image is cropped. i have checked top margin, left margin, specially enc.vvalid, vvalida..they are all set correct.

i believe it's quite easy to reproduce on DVEVM. no need to run any application or connect any video input. just set bootargs to 720x480 for osd0, connect the composite video output from DVEVM to a TV (without overscan), during bootup, you will see the bottom white line on black screen.

Hao Liu,

I have few suggestions here.

1. Can you run the v4l2 loopback aplication by disabling fb driver. This is just to check what role FB driver is playing in this issue. [Note: also, you don't need FB driver if you are using V4l2 loop-back]

2. Can you please dump OSD/VENC registers? Pl refer section 6.2 and 6.3 in VPFE user guide to know about those registers.

~Nag

1. disabled the davinvifb driver and run loopback: yes the white is still there

2. below are the VENC and OSD registers dump. i print them out at the very end of davinci_enc_set_ntsc() function in davinvi_platform.c

------------VENC registers-------------
VENC Offset=0x0 Value=0x3
VENC Offset=0x4 Value=0x0
VENC Offset=0x8 Value=0x0
VENC Offset=0xc Value=0x0
VENC Offset=0x10 Value=0x0
VENC Offset=0x14 Value=0x0
VENC Offset=0x18 Value=0x0
VENC Offset=0x1c Value=0x0
VENC Offset=0x20 Value=0x0
VENC Offset=0x24 Value=0x0
VENC Offset=0x28 Value=0x0
VENC Offset=0x2c Value=0x0
VENC Offset=0x30 Value=0x0
VENC Offset=0x34 Value=0x0
VENC Offset=0x38 Value=0x0
VENC Offset=0x3c Value=0x0
VENC Offset=0x40 Value=0xff00
VENC Offset=0x44 Value=0x0
VENC Offset=0x48 Value=0x0
VENC Offset=0x4c Value=0x0
VENC Offset=0x50 Value=0x0
VENC Offset=0x54 Value=0x0
VENC Offset=0x58 Value=0x0
VENC Offset=0x5c Value=0x0
VENC Offset=0x60 Value=0x0
VENC Offset=0x64 Value=0x0
VENC Offset=0x68 Value=0x0
VENC Offset=0x6c Value=0x0
VENC Offset=0x70 Value=0x0
VENC Offset=0x74 Value=0x0
VENC Offset=0x78 Value=0x0
VENC Offset=0x7c Value=0x0
VENC Offset=0x80 Value=0x0
VENC Offset=0x84 Value=0x0
VENC Offset=0x88 Value=0x0
VENC Offset=0x8c Value=0x0
VENC Offset=0x90 Value=0x0
VENC Offset=0x94 Value=0x0
VENC Offset=0x98 Value=0x0
VENC Offset=0x9c Value=0x0
VENC Offset=0xa0 Value=0x0
VENC Offset=0xa4 Value=0x0
VENC Offset=0xa8 Value=0x0
VENC Offset=0xac Value=0x0
VENC Offset=0xb0 Value=0x0
VENC Offset=0xb4 Value=0x0
VENC Offset=0xb8 Value=0x10
VENC Offset=0xbc Value=0x0
VENC Offset=0xc0 Value=0x0
VENC Offset=0xc4 Value=0x0
VENC Offset=0xc8 Value=0x0
VENC Offset=0xcc Value=0x17a
VENC Offset=0xd0 Value=0x0
VENC Offset=0xd4 Value=0x0
VENC Offset=0xd8 Value=0x0
VENC Offset=0xdc Value=0x0
VENC Offset=0xe0 Value=0x100
VENC Offset=0xe4 Value=0x0
VENC Offset=0xe8 Value=0x0
VENC Offset=0xec Value=0x0
VENC Offset=0xf0 Value=0x0
VENC Offset=0xf4 Value=0x21
VENC Offset=0xf8 Value=0x0
VENC Offset=0xfc Value=0x0
VENC Offset=0x100 Value=0x400
VENC Offset=0x104 Value=0x57c
VENC Offset=0x108 Value=0x159
VENC Offset=0x10c Value=0x2cb
VENC Offset=0x110 Value=0x6ee
VENC Offset=0x114 Value=0x400
VENC Offset=0x118 Value=0x57c
VENC Offset=0x11c Value=0x159
VENC Offset=0x120 Value=0x2cb
VENC Offset=0x124 Value=0x6ee
VENC Offset=0x128 Value=0x0
VENC Offset=0x12c Value=0x1
VENC Offset=0x130 Value=0x2
VENC Offset=0x134 Value=0x0
VENC Offset=0x138 Value=0x0
VENC Offset=0x13c Value=0x0
VENC Offset=0x140 Value=0x1
VENC Offset=0x144 Value=0x70
VENC Offset=0x148 Value=0x0
VENC Offset=0x14c Value=0x0
VENC Offset=0x150 Value=0x0
VENC Offset=0x154 Value=0x0
VENC Offset=0x158 Value=0x0
VENC Offset=0x15c Value=0x0
VENC Offset=0x160 Value=0x0
VENC Offset=0x164 Value=0x0
VENC Offset=0x168 Value=0x0
VENC Offset=0x16c Value=0x0
VENC Offset=0x170 Value=0xaa3c
------------OSD registers-------------
OSD Offset=0x0 Value=0x0
OSD Offset=0x4 Value=0x0
OSD Offset=0x8 Value=0x303b
OSD Offset=0xc Value=0x8002
OSD Offset=0x10 Value=0x0
OSD Offset=0x14 Value=0x0
OSD Offset=0x18 Value=0x0
OSD Offset=0x1c Value=0x0
OSD Offset=0x20 Value=0x102d
OSD Offset=0x24 Value=0x100c
OSD Offset=0x28 Value=0x0
OSD Offset=0x2c Value=0x0
OSD Offset=0x30 Value=0x0
OSD Offset=0x34 Value=0x2120
OSD Offset=0x38 Value=0x0
OSD Offset=0x3c Value=0x0
OSD Offset=0x40 Value=0x79
OSD Offset=0x44 Value=0x10
OSD Offset=0x48 Value=0x0
OSD Offset=0x4c Value=0x0
OSD Offset=0x50 Value=0x0
OSD Offset=0x54 Value=0x0
OSD Offset=0x58 Value=0x0
OSD Offset=0x5c Value=0x0
OSD Offset=0x60 Value=0x0
OSD Offset=0x64 Value=0x0
OSD Offset=0x68 Value=0x0
OSD Offset=0x6c Value=0x0
OSD Offset=0x70 Value=0x2d0
OSD Offset=0x74 Value=0xf0
OSD Offset=0x78 Value=0x0
OSD Offset=0x7c Value=0x0
OSD Offset=0x80 Value=0x2d0
OSD Offset=0x84 Value=0xf0
OSD Offset=0x88 Value=0x0
OSD Offset=0x8c Value=0x0
OSD Offset=0x90 Value=0x0
OSD Offset=0x94 Value=0x0
OSD Offset=0x98 Value=0x0
OSD Offset=0x9c Value=0x0
OSD Offset=0xa0 Value=0x0
OSD Offset=0xa4 Value=0x0
OSD Offset=0xa8 Value=0x0
OSD Offset=0xac Value=0x0
OSD Offset=0xb0 Value=0x0
OSD Offset=0xb4 Value=0x0
OSD Offset=0xb8 Value=0x0
OSD Offset=0xbc Value=0x0
OSD Offset=0xc0 Value=0x0
OSD Offset=0xc4 Value=0x0
OSD Offset=0xc8 Value=0x0
OSD Offset=0xcc Value=0x0
OSD Offset=0xd0 Value=0x0
OSD Offset=0xd4 Value=0x0
OSD Offset=0xd8 Value=0x0
OSD Offset=0xdc Value=0x0
OSD Offset=0xe0 Value=0x0
OSD Offset=0xe4 Value=0x0
OSD Offset=0xe8 Value=0x80
OSD Offset=0xec Value=0x0
OSD Offset=0xf0 Value=0x0
OSD Offset=0xf4 Value=0x0
OSD Offset=0xf8 Value=0x0
OSD Offset=0xfc Value=0x0

after many experiments, the white lines are still there...

in past few weeks, we have added support for DVI output. the hardware design is same as leopard dm365 DVI board, using TFP410 encoder. our encoder driver is similar as leopard DVI driver too. from the DVI 480P output, the picture is perfect. there is NO white lines.

so the problem seems to be in the VPBE...

I am having same probelm...has there been an answer to this, or somewhere else under a different post?

Hi Randy

It seems it could be caused by TV encoder signal timing. You might have to change the signal timing to work -

One of hte changes that worked for another customer is to change upper_margin from 0x10 to 0x12 in  vpbe_encoder.c

Let me know if this helps

Prateek

Hi Prateek,

had tried that before...it only shifts the white bars up/down...I can't believe it is timing...

NOTE: I am not using OSD...I wonder where that WHITE comes from?? Usually uninitialized data is black or green....but, almost NEVER white...I think somehow the OSD module is overlaying white even though it has been disabled???

Really, NTSC timing deals with 525 lines...we tell the DAC/VPBE that we have 480 lines...this is only "ACTIVE VIDEO"...not sure how correctly the "other lines" (blanking, etc.) are handled.

Randy

So, I turned on the internal color bars, and the white lines are NOT present...so, this verifies that (most) VENC settings are okay, and that timing is okay...It seems to point to either corrupted buffers, bug in OSD module (when disabled, etc.?)...or some mis-programmed register in OSD module.

I know my data buffers are okay as when I send them output the IP interface all data is good..no white lines...

Can anyone at TI explain why OSD_BASE_PY must be set to anything other than 0 (NTSC, UYVY)???

The register description states:

Base pixel (line) in Y. Vertical base display reference position for all windows. Specified as number

of lines from VD. Value used is MAX(BPY,1), i.e., minimum value is 1. This bit is latched by VD.

WHY must we configure ANY offset??  We are losing information/data on our CVBS display...(which anyone will see when using a monitor capable of UNDERSCAN, which is common in surveillance applications)...

So, basically, we capture 480 lines of information, however, we only get 480-16 on our display due to having to set this offset...if it is left at 0 we get a white bar at the TOP of the display, instead of at the bottom...so, VENC is only clocking our 480-16 lines...OSD_BASE_PY only determines where the WHITE lines are displayed...top/bottom, or half and half...

So, we are not losing any data...I put a one line colored bar at top and bottom of my buffers, and I can see both...the white bars are in the VBI area..

If you configure the software to use  ROM_CLUT1, instead of ROM_CLUT0, the VBI area will be black, as expected.

Original code (from 2.6.18 kernel) in davinci_osd.c is:

        if (cpu_is_davinci_dm644x_pg1x() || cpu_is_davinci_dm357()) {
                /*
                 * DM6446 silicon advisory 1.3.8 says that when using interlaced
                 * video output, the field signal is improperly inverted for
                 * OSD0, OSD1, and VID1.  The field signal is not inverted for
                 * VID0.  The workaround is to set the field signal inversion
                 * bit so that OSD0, OSD1, and VID1 have the correct field
                 * polarity.  The VID0 ping-pong buffer register will be used
                 * in the encoder ISR to compensate for the reversed field
                 * polarity of VID0.
                 */
                osd->field_inversion = 1;
        }
        else if (cpu_is_davinci_dm355()) {
                /*
                 * ROM CLUT1 on the DM355 is similar (identical?) to ROM CLUT0
                 * on the DM6446, so make ROM_CLUT1 the default on the DM355.
                 */
                osd->rom_clut = ROM_CLUT1;
        }

There is no special case for DM365...so, the default is ROM_CLUT0...which for whatever reason creates the WHITE bars....where if you use ROM_CLUT1 you will get the expected BLACK...

Hi, we have a similar problem to what the OP posted. We are having about 30 black lines at the bottom of the screen. When we changed the color of the OSD init in our app, the 30 black lines will change in color to the color that we set. So we are pretty sure the 30 lines are coming from the OSD layer, even though we set the OSD to be transparent.

Even more strange is the fact that the 30 lines of black will disappear after about 10 minutes and the video below it shows correctly.

Anyone seen this problem?

We are running the 2.6.18 DM6446 distro from the TI DVSDK.

I am also facing the same problem with dm365 preview. For PAL the white bars are gone by setting the "mode_info->left_margin". But for NTSC the white bars are not gone. 

Is there any solution for this ?

Hi All,

I am able to fix the NTSC display problems, by increasing the height to 488 instead of 480.

I changed the avServerUi.c in ipnc as shown below.

               config->displayConfig.expandH             = FALSE;
              config->displayConfig.expandV             = FALSE;

            config->displayConfig.width          = 720;
            config->displayConfig.height        = 480+8;

            config->captureConfig[0].width              =720;
            config->captureConfig[0].height             = 480;
            config->encodeConfig[0].cropWidth           = ALIGN_ENCODE(config->captureConfig[0].width);
            config->encodeConfig[0].cropHeight           = ALIGN_ENCODE(config->captureConfig[0].height);

            config->captureConfig[1].width              = 720;
            config->captureConfig[1].height             = 480+8;
            config->encodeConfig[1].cropWidth           = ALIGN_ENCODE(config->captureConfig[1].width);
            config->encodeConfig[1].cropHeight           = ALIGN_ENCODE(config->captureConfig[1].height);

I changed    the file  " linux_kernel/drivers/media/video/ vpbe_encoder.c" as shown below.
            {
            .name = VID_ENC_STD_NTSC,
            .std = 1,
            .if_type = VID_ENC_IF_INT,
            .interlaced = 1,
            .xres = 720,
            .yres = 480+8,
            .fps = {30000, 1001},
            .left_margin = 0x79,
            .right_margin = 0,
            .upper_margin = 0x10,
            .lower_margin = 0,
            .hsync_len = 0,
            .vsync_len = 0,
            .flags = 0},
            {
            .name = VID_ENC_STD_PAL,
            .std = 1,
            .if_type = VID_ENC_IF_INT,
            .interlaced = 1,
            .xres = 720,
            .yres = 576,
            .fps = {25, 1},
            .left_margin = 0x7E,
            .right_margin = 0,
            .upper_margin = 0x13,
            .lower_margin = 0,
            .hsync_len = 0,
            .vsync_len = 0,
            .flags = 0},
            }