Other Parts Discussed in Thread: TLV320AIC3104
HI,
We have developed a custom board with AM5718 processor using ti-processor-sdk-linux-am57xx-evm-05.02.00.10. In the process of playing audio we are facing the problem and we are listing the patches and the parameters that we have changed in order to get the audio but we are unable to make the audio get played. For our processor in order to get the audio to play the MCLK should be 20MHz but after applying the below changes we are getting the MCLK as 50MHz. Kindly go through the patches and the log we have attached and suggest what parameters should we modify in order to get the MCLK as 20MHz which is acting as a core thing in order to make the audio played.
We have added the highlighted part in davinci-mcasp.c
static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id,
unsigned int freq, int dir)
{
static void __iomem *mcasp3_base;
uint32_t value/*,ui_temp*/;
struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
printk(KERN_INFO "Enter davinci_mcasp_set_sysclk()\n");
pm_runtime_get_sync(mcasp->dev);
printk(KERN_INFO "dir == SND_SOC_CLOCK_OUT\n");
mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);
mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);
mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX);
#if 0
if (dir == SND_SOC_CLOCK_IN) {
switch (clk_id) {
case MCASP_CLK_HCLK_AHCLK:
mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG,
AHCLKXE);
mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG,
AHCLKRE);
mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX);
break;
case MCASP_CLK_HCLK_AUXCLK:
mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG,
AHCLKXE);
mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG,
AHCLKRE);
break;
default:
dev_err(mcasp->dev, "Invalid clk id: %d\n", clk_id);
goto out;
}
} else {
/* Select AUXCLK as HCLK */
mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);
mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);
mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX);
}
#endif
mcasp3_base = ioremap(0x4A00369C,4);
value = __raw_readl(mcasp3_base);
printk(KERN_INFO "XREF_CLKOUT2 == %x \n",value);
(void)__raw_writel(0x10003,mcasp3_base );
mcasp3_base = ioremap(0x4A003774,4);
value = __raw_readl(mcasp3_base);
(void)__raw_writel(0x4000A,mcasp3_base );
mcasp3_base = ioremap(0x48440216,4);
value = __raw_readl(mcasp3_base);
(void)__raw_writel(value|0x2,mcasp3_base );
/*
* When AHCLK X/R is selected to be output it means that the HCLK is
* the same clock - coming via AUXCLK.
*/
mcasp->sysclk_freq = freq;
//out:
pm_runtime_put(mcasp->dev);
return 0;
}
am571x-idk.dts file :
sound0: sound@0 {
compatible = "simple-audio-card";
simple-audio-card,name = "AM571x";
simple-audio-card,widgets =
"Line", "Line Out",
"Line", "Line In";
simple-audio-card,routing =
"Line Out", "LLOUT",
"Line Out", "RLOUT",
"MIC2L", "Line In",
"MIC2R", "Line In";
simple-audio-card,format = "dsp_b";
simple-audio-card,bitclock-master = <&sound0_master>;
simple-audio-card,frame-master = <&sound0_master>;
simple-audio-card,bitclock-inversion;
simple-audio-card,cpu {
sound-dai = <&mcasp3>;
system-clock-frequency = <5644800>;
};
sound0_master: simple-audio-card,codec {
sound-dai = <&tlv320aic3104>;
clocks = <&clkout2_clk>;
//clocks = <&atl_clkin2_ck>;
};
};
mcasp3_pins_default: mcasp3_pins_default {
pinctrl-single,pins = <
0x29c ((0x40000)|PIN_OUTPUT_PULLUP | MUX_MODE3) /* clk2. */
0x328 ( (0xC0000)| MUX_MODE0) /* mcasp3_fsx.mcasp1_fsx */
0x324 ( (0x40000)| MUX_MODE0) /* mcasp3_aclkx.mcasp1_aclkx */
0x32c ((0xC0000) | MUX_MODE0) /* mcasp3_axr0.mcasp1_axr0 */
0x330 ((0xC0160) | MUX_MODE0) /* mcasp3_axr1.mcasp1_axr1 */
>;
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
tlv320aic3104: tlv320aic3104@18 {
#sound-dai-cells = <0>;
compatible = "ti,tlv320aic3104";
reg = <0x18>;
assigned-clocks = <&clkoutmux2_clk_mux>;
assigned-clock-parents = <&sys_clk2_dclk_div>;
adc-settle-ms = <40>;
AVDD-supply = <&vdd_3v3>;
IOVDD-supply = <&vdd_3v3>;
DRVDD-supply = <&vdd_3v3>;
DVDD-supply = <&aic_dvdd>;
status = "okay";
};
};
&mcasp3 {
#sound-dai-cells = <0>;
status = "okay";
pinctrl-0 = <&mcasp3_pins_default>;
assigned-clocks = <&mcasp3_ahclkx_mux>;
assigned-clock-parents = <&sys_clkin2>;
assigned-clock-rates = <22579200>;
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
/* 4 serializers */
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 2 0 0
>;
tx-num-evt = <8>;
rx-num-evt = <8>;
};
Thanks & Regards
Prasad.
