TMS320C6747: TMS320C6747 - PAF5 version SPI slave mode communication failure

Hi Dibin

The issues sounds similar to what you have posted for K2G

https://e2e.ti.com/support/processors/f/791/p/837087/3096467#3096467

We have no support for PAF in public E2E and no one to support this frame work.      

However general recommendations would be

1) Further understand if the issue is related to data contention or something to do with interrupts/task priority and CPU getting tied up on servicing multiple interrupts etc. 

2) If it is due to data contention/bottlenecks - try 

a) To reduce SPI clock or McASP clock frequency to see if it helps (this may not be acceptable for the end application, if it has a specific data rate/throughput requirements)

b) Try to see if putting McASP and SPI buffers on different memory locations helps - e.g. putting mcasp buffers on L2 or Shared RAM and spi traffic on SDRAM

c) Try to "optimize" data movement by things like doing 16/32 bit transfers if you are doing 8 bit SPI transfers; Ensure that SPI and McASP are using different Queue/TCs if EDMA is used.

d) Ensure that CPU/EDMA Queue priority is such that critical traffic is at higher priority 

3) If you suspect CPU resource issue in terms of servicing interrupts from SPI and McASP etc

a) Ensure the BIOS tasks priorities are setup  appropriately. 

b) Ensure that SPI and McASP interrupts into DSP INTC are routed to separate interrupt signals

c) Optimize interrupt rate, if the rate of interrupts is too high, by buffering , using EDMA , bigger data size etc.

Mostly generic recommendations and areas to look at , given we do not have familiarity with the PAF, but can potentially help with device level questions if you find there is a contention/bandwidth issue somewhere.

Regards

Mukul