AM3352: DDR3 phase difference between DQS and CK

Denny%20Yang99373

Part Number: AM3352

Hi all,

Customer find the DQS and CK signal phase difference about -997ps. It's bigger than DDR chip requirement which is -400~400ps.

Are there any register can adjust this? thanks!

BR,

Denny

over 6 years ago

0 JJD over 6 years ago

TI__Guru* 86950 points

Denny, did the customer properly configure the DDR PHY by filling out the SlaveRatio spreadsheet (found on this page: http://processors.wiki.ti.com/index.php/AM335x_DDR_PHY_register_configuration_for_DDR3_using_Software_Leveling

When filling out the spreadsheet, be sure to use INVERT_CLKOUT = 1.

Regards,

James

0 JJD over 5 years ago in reply to JJD

TI__Guru* 86950 points

I am closing this thread. Please note that we have recently published an updated spreadsheet tool which facilitates the DDR3 configuration for AM335x:

Regards,

James

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AM3352: DDR3 phase difference between DQS and CK