TMS320C6678: pcie boot failure

Hi,

What sw are you trying to boot? Processor SDK RTOS or some custom application?

Best Regards,
Yordan

We use the pcie boot mode. Host write our own 6678 program every time when windows startup. sometimes the 66780program(.bin file)deed write into the dsp memory--I watched this by emulator--but 6678 failed to boot from the magic address.

All board may went wrong， in some platforms,the wrong condition are more likely to appear , others are particularly rare to appear. We don not use any user

IBL.

Do we need to control the LRESET NMI LRESETNMIEN CORESEL pins when windows startup?that is when system reset or powerup? we connet those pins to fpga.

When dsp failed to boot,we can start the program by setting the PC pointer to the magic address through ccs, then our system will work well. dsp board is used as a pcie card in our platform.

thank you for your replay.

Hi,

1. can you clarify if you always boot from RBL? What is the C6678 silicon revision?

2. can you confirm that in the boot failure case, the PCIE link is always established and the PCIE image is downloaded to DSP memory (so even it failed to boot, you can write _c_int00 by JTAG and it runs properly)?

3. In the failure case, do you see that _c_int00 is written into MAGIC_ADDRESS? This is done by your application.

4. If you use RBL, the code may be in WFI or assembly idle, how do you wake up the DSP core? Do you send an interrupt? I

Regards, Eric 

Any news?

Regards, Eric

1.revision number is 2.I am a bit confused about the RBL,Do i need to modify anything about rbl?my boot mode is pcie boot.

2. yes ,i am sure! I can do this by just modify register PC to c_int00 address. the pcie interface works well,it can read write data,can interrupt.

3. yes.magic address is correct.

4.I do not use custom RBL, we wake up core0 by send pcie interrupt,as described in bootloader user guide.

thanks.

Hi,

The RBL is ROM bootloader, you can't modify it. In the failure case, you confirmed that PCIE interface also worked well from #2.

The step 3 and 4 are also correct. Then the issue is that when you sent an interrupt, the ROM code still in assembly idle, without jump to _c_int00. I will check our boot expert for this.

Do you have a code snippet for step 4 to share with us? And the exact PC location (0x20b0xxxx) in the failure case?

Regards, Eric 

hi,

the problem is exact this:Then the issue is that when you sent an interrupt, the ROM code still in assembly idle, without jump to _c_int00.

Do you need the assembly code in 20b0xxxx?or the code RBL write to 8000000(If I remember correctly).I will tell you the idle address tomorrow.

thanks a lot.

when got wrong,the address of core0 is 20b01290,core1 to core7 are 20b002c8.

It is not easy for me to past the code ,and I don't  know how to post a picture. sorry. I have compared the contents of mem in the last d23f bytes in core0,it does have some difference in the 1087ff80 section. others are the same.

hi,

 is there any news?

 can you tell me what reason may cause boot failure?clock?voltage?or state of reset  signals?

hi

 is there anything new?

 could you specify the potential reasons of boot failure? clock?voltage?reset signals state?

Hi,

I asked our ROM boot expert. He was in business travel and we should update in a few days. Sorry for this!

Regards, Eric

Rahul:

    thank you for your reply.

    the funtion name give me some idear about the failure.

   My system start to work when windows getup,that means the pcie interface worked well as I mentioned before. then I exit my program, connect dsp by ccs ,run my program again, sometimes dsp failed to response to pcie interrupt. can this have some help?