TMS320C6748: Questions about hardware and software

Hi,

1.      The chip spec makes it very clear that it does not support ODT. However, I seea reference design that pull up DDRII chip ODT pin and soldered none external termination resistor. It works just fine at 150MHz. How could that happen???

In general reference designs may be manufactured before there was a datasheet (and full characterization) of the SoC, so there may be mistakes in their design. This is why you MUST follow the datasheet recommendations first!

2.      I don’t use SATA. For pin SATA_VDD, the spec says: Prior to silicon revision 2.0, this supply must be connected to a static 1.2V nominal supply. For silicon revision 2.0 and later, this supply may be left unconnected for additional power conservation.

If I buy a chip from a distributor, or my OEM supplier buy a chip from market, how could we ensure that we are buying what version of silicon?

You should look at the markings on the SoC package and compare them with Figure7-1. Device Nomenclature in the Datasheet.

3.      I would connect to my FPGA with EMIF instead of UPP. Since UPP can only access FPGA with sequential address starting from 0 instead of random address. I would implement thousands of registers inside the FPGA and the FPGA will act as a SRAM to DSP. The FPGA register could be accessed like SRAM. I would use pointers in C and assign fixed address to the points for programming. Any recommendation or any potential risk here?

This should be possible, there are threads discussing connecting TMS320C6748 & FPGA through EMIF, however TI does not provide example codes for this, as there is no such reference EVM. 

4. PRUSS seems like a cool feature. But I never see there is any documentation about the software development on PRUSS. Any docs, or example project for reference?

Take a look at the following guide:
 

NOTE that this is a common guide for all dsp & sitara devices, so not all examples work on all boards.

Best Regards,
Yordan