//------------------------------call_isp.c---------------------
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <sys/mman.h>
#include <linux/fb.h>
#include <sys/socket.h>
#include <asm/types.h>
#include <linux/netlink.h>
#define FRAME_BUFF_SZ 512*512//672*480
int file;
int main(void)
{
int video;
int contrast,bright;
int i;
char *pbuff = NULL;
char AppBuf[512*512];
system("busybox-omap rmmod isp.ko");
system("busybox-omap insmod ./isp.ko");
file= open ("/dev/isp", O_RDWR);
if(file<0)
{
printf("Open driver faile\n");
}
while(1)
{
read(file, AppBuf, 512*512);
// printf("AppBuf[400]=%02X\n",AppBuf[400]);
}
close (file);
}
//-----------------------------call_isp.c---end------------------
//-----------------------------isp.c-------------------------------------------------
/* This is the OMAP35xx Camera ISP Driver used for F60plus.
* We drop the V4L2 (Video for Linux 2) method, we only use
* the simply way of configuring the registers to let the camera
* port receive the data from FPGA.
*/
#include <linux/fs.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/kref.h>
#include <asm/uaccess.h>
#include <asm/irq.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/version.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <asm/scatterlist.h>
#include <asm/mach-types.h>
//#include <asm/arch/clock.h>
#include <linux/device.h>
#include <mach/hardware.h>
#include <linux/fb.h>
#include <linux/dma-mapping.h>
#include <linux/vmalloc.h>
#include <linux/mm.h>
#include <linux/device.h>
#include <mach/display.h>
//#include <mach/omapfb.h>
//#include "capture.h"
#include "Capture.h"
#include "isp.h"
//int isp_major = 0;
#define CAMERA_ISP_MAJOR 232 //define the major number of the device
#define VM_RESERVED 0x00080000 /* Count as reserved_vm like IO */
#define CAPTURE_NAME "omap35xxCapture"
typedef char cam_isp_dev_t;
static cam_isp_dev_t cam_isp_devices[257];
static wait_queue_head_t w_queue;
//static int w_flag = 0;
static unsigned char * CptDataBuf __attribute__ ((aligned(32)));
static unsigned char * CptDataBuf_phy __attribute__ ((aligned(32)));
static int xieyuTag;
static void isp_clk_config(void)
{
omap_writel(EN_CSI2(0) | EN_CAM(1), CM_FCLKEN_CAM);
omap_writel(EN_CAM(1), CM_ICLKEN_CAM);
omap_writel(ST_CAM(1), CM_IDLEST_CAM);
omap_writel(AUTO_CAM(1), CM_AUTOIDLE_CAM);
omap_writel(0x3, CM_CLKSEL_CAM);
omap_writel(EN_MPU(1), CM_SLEEPDEP_CAM);
omap_writel(CLKTRCTRL_CAM(3), CM_CLKSTCTRL_CAM);
omap_writel(CLKACTIVITY_CAM(1), CM_CLKSTST_CAM);
omap_writel(POWERSTATE(3), PM_PWSTCTRL_CAM);
omap_writel(LASTPOWERSTATEENTERED(3), PM_PREPWSTST_CAM);
omap_writel( EN_WKUP(1) | EN_IVA2(1) | EN_MPU(1), PM_WKDEP_CAM );
omap_writel( COREDOMAINWKUP_RST(1) | DOMAINWKUP_RST(1) | GLOBALWARM_RST(1) | GLOBALCOLD_RST(1), RM_RSTST_CAM );
////printk("RM_RSTST_CAM = 0x%x\n",omap_readl(RM_RSTST_CAM));
////printk("PM_WKDEP_CAM = 0x%x\n",omap_readl(PM_WKDEP_CAM));
////printk("PM_PWSTCTRL_CAM = 0x%x\n",omap_readl(PM_PWSTCTRL_CAM));
////printk("PM_PWSTST_CAM = 0x%x\n",omap_readl(PM_PWSTST_CAM));
////printk("PM_PREPWSTST_CAM = 0x%x\n",omap_readl(PM_PREPWSTST_CAM));
////printk("CM_FCLKEN_CAM = 0x%x\n",omap_readl(CM_FCLKEN_CAM));
////printk("CM_ICLKEN_CAM = 0x%x\n",omap_readl(CM_ICLKEN_CAM));
////printk("CM_IDLEST_CAM = 0x%x\n",omap_readl(CM_IDLEST_CAM));
////printk("CM_AUTOIDLE_CAM = 0x%x\n",omap_readl(CM_AUTOIDLE_CAM));
////printk("CM_CLKSEL_CAM = 0x%x\n",omap_readl(CM_CLKSEL_CAM));
////printk("CM_SLEEPDEP_CAM = 0x%x\n",omap_readl(CM_SLEEPDEP_CAM));
////printk("CM_CLKSTCTRL_CAM = 0x%x\n",omap_readl(CM_CLKSTCTRL_CAM));
////printk("CM_CLKSTST_CAM = 0x%x\n",omap_readl(CM_CLKSTST_CAM));
}
static void isp_pin_config(void)
{
unsigned int data;
data = omap_readl(ISP_CONTROL_PADCONF_CAM_HS);
////printk("CONTROL_PADCONF_CAM_HS = 0x%x \n", data);
omap_writel(0x12181218, ISP_CONTROL_PADCONF_CAM_HS);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_HS);
////printk("CONTROL_PADCONF_CAM_HS = 0x%x \n", data);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_XCLKA);
////printk("CONTROL_PADCONF_CAM_XCLKA = 0x%x \n", data);
omap_writel(0x3f181718, ISP_CONTROL_PADCONF_CAM_XCLKA);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_XCLKA);
////printk("CONTROL_PADCONF_CAM_XCLKA = 0x%x \n", data);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_FLD);
////printk("CONTROL_PADCONF_CAM_FLD = 0x%x \n", data);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_D1);
////printk("CONTROL_PADCONF_CAM_D1 = 0x%x \n", data);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_D3);
////printk("CONTROL_PADCONF_CAM_D3 = 0x%x \n", data);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_D5);
////printk("CONTROL_PADCONF_CAM_D5 = 0x%x \n", data);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_D7);
////printk("CONTROL_PADCONF_CAM_D7 = 0x%x \n", data);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_D9);
////printk("CONTROL_PADCONF_CAM_D9 = 0x%x \n", data);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_D11);
////printk("CONTROL_PADCONF_CAM_D11 = 0x%x \n", data);
data = omap_readl(ISP_CONTROL_PADCONF_CAM_WEN);
////printk("CONTROL_PADCONF_CAM_WEN = 0x%x \n", data);
}
static void isp_timing_config(void)
{
//unsigned int data;
omap_writel(GRESETDIR(1) | DIVC(2) | DIVA(7), ISP_TCTRL_CTRL);
omap_writel(HS_VS_IRQ(1) |
SEC_ERR_IRQ(1) |
OCP_ERR_IRQ(1) |
MMU_ERR_IRQ(1) |
OVF_IRQ(1) |
RSZ_DONE_IRQ(1) |
CBUFF_IRQ(1) |
PRV_DONE_IRQ(1) |
CCDC_LSC_PREFETCH_ERRO(1) |
CCDC_LSC_DONE(1) |
HIST_DONE_IRQ(1) |
H3A_AWB_DONE_IRQ(1) |
H3A_AF_DONE_IRQ(1) |
CCDC_ERR_IRQ(1) |
CCDC_VD2_IRQ(1) |
CCDC_VD1_IRQ(1) |
CCDC_VD0_IRQ(1)
,ISP_IRQ0STATUS);
omap_writel(HS_VS_IRQ(1) |
SEC_ERR_IRQ(0) |
OCP_ERR_IRQ(0) |
MMU_ERR_IRQ(0) |
OVF_IRQ(0) |
RSZ_DONE_IRQ(0) |
CBUFF_IRQ(0) |
PRV_DONE_IRQ(0) |
CCDC_LSC_PREFETCH_ERRO(0) |
CCDC_LSC_DONE(0) |
HIST_DONE_IRQ(0) |
H3A_AWB_DONE_IRQ(0) |
H3A_AF_DONE_IRQ(0) |
CCDC_ERR_IRQ(0) |
CCDC_VD2_IRQ(0) |
CCDC_VD1_IRQ(0) |
CCDC_VD0_IRQ(0)
,ISP_IRQ0ENABLE);
omap_writel(0x0,ISP_TCTRL_FRAME);
omap_writel(0x0,ISP_TCTRL_PSTRB_DELAY);
omap_writel(0x0,ISP_TCTRL_STRB_DELAY);
omap_writel(0x0,ISP_TCTRL_SHUT_DELAY);
omap_writel(0x0,ISP_TCTRL_PSTRB_LENGTH);
omap_writel(0x0,ISP_TCTRL_STRB_LENGTH);
omap_writel(0x0,ISP_TCTRL_SHUT_LENGTH);
////printk("ISP_TCTRL_CTRL = 0x%x \n", omap_readl(ISP_TCTRL_CTRL) );
////printk("ISP_IRQ0ENABLE = 0x%x \n", omap_readl(ISP_IRQ0ENABLE) );
////printk("ISP_IRQ1ENABLE = 0x%x \n", omap_readl(ISP_IRQ1ENABLE) );
////printk("ISP_TCTRL_FRAME = 0x%x \n", omap_readl(ISP_TCTRL_FRAME) );
////printk("ISP_TCTRL_PSTRB_DELAY = 0x%x \n", omap_readl(ISP_TCTRL_PSTRB_DELAY) );
////printk("ISP_TCTRL_SHUT_DELAY = 0x%x \n", omap_readl(ISP_TCTRL_SHUT_DELAY) );
////printk("ISP_TCTRL_PSTRB_LENGTH = 0x%x \n", omap_readl(ISP_TCTRL_PSTRB_LENGTH) );
////printk("ISP_TCTRL_SHUT_LENGTH = 0x%x \n", omap_readl(ISP_TCTRL_SHUT_LENGTH) );
////printk("ISP_PING_PONG_ADDR = 0x%x \n", omap_readl(ISP_PING_PONG_ADDR) );
////printk("ISP_PING_PONG_MEM_RANGE = 0x%x \n", omap_readl(ISP_PING_PONG_MEM_RANGE) );
////printk("ISP_PING_PONG_BUF_SIZE = 0x%x \n", omap_readl(ISP_PING_PONG_BUF_SIZE) );
}
static void isp_BridgeLane_config(void)
{
unsigned int data;
/***** ISP_CTRL */
omap_writel(FLUSH(0) |
JPEG_FLUSH(0) |
CCDC_WEN_POL(1) |
SBL_SHARED_RPORTB(0) |
SBL_AUTOIDLE(1) |
SBL_WR0_RAM_EN(0) |
SBL_WR1_RAM_EN(0) |
SBL_RD_RAM_EN(1) |
PREV_RAM_EN(0) |
CCDC_RAM_EN(0) |
SYNC_DETECT(0x3) |
RSZ_CLK_EN(0) |
PRV_CLK_EN(0) |
HIST_CLK_EN(0) |
H3A_CLK_EN(0) |
CBUFF_AUTOGATING(0) |
CCDC_CLK_EN(1) |
SHIFT(0) |
PAR_CLK_POL(1) |
PAR_BRIDGE(0) |
PAR_SER_CLK_SEL(0)
,ISP_CTRL);
data = omap_readl(ISP_CTRL);
//printk("ISP_CTRL= 0x%x\n",data);
}
//static void isp_SBL_config(void){
////printk("SBL_PCR = 0x%x\n",omap_readl(SBL_PCR ));
////printk("SBL_GLB_REG_0 = 0x%x\n",omap_readl(SBL_GLB_REG_0 ));
////printk("SBL_GLB_REG_1 = 0x%x\n",omap_readl(SBL_GLB_REG_1 ));
////printk("SBL_GLB_REG_2 = 0x%x\n",omap_readl(SBL_GLB_REG_2 ));
////printk("SBL_GLB_REG_3 = 0x%x\n",omap_readl(SBL_GLB_REG_3 ));
////printk("SBL_GLB_REG_4 = 0x%x\n",omap_readl(SBL_GLB_REG_4 ));
////printk("SBL_GLB_REG_5 = 0x%x\n",omap_readl(SBL_GLB_REG_5 ));
////printk("SBL_GLB_REG_6 = 0x%x\n",omap_readl(SBL_GLB_REG_6 ));
////printk("SBL_GLB_REG_7 = 0x%x\n",omap_readl(SBL_GLB_REG_7 ));
////printk("SBL_CCDC_WR_0 = 0x%x\n",omap_readl(SBL_CCDC_WR_0 ));
////printk("SBL_CCDC_WR_1 = 0x%x\n",omap_readl(SBL_CCDC_WR_1 ));
////printk("SBL_CCDC_WR_2 = 0x%x\n",omap_readl(SBL_CCDC_WR_2 ));
////printk("SBL_CCDC_WR_3 = 0x%x\n",omap_readl(SBL_CCDC_WR_3 ));
////printk("SBL_CCDC_FP_RD_0 = 0x%x\n",omap_readl(SBL_CCDC_FP_RD_0 ));
////printk("SBL_CCDC_FP_RD_1 = 0x%x\n",omap_readl(SBL_CCDC_FP_RD_1 ));
////printk("SBL_PRV_RD_0 = 0x%x\n",omap_readl(SBL_PRV_RD_0 ));
////printk("SBL_PRV_RD_1 = 0x%x\n",omap_readl(SBL_PRV_RD_1 ));
////printk("SBL_PRV_RD_2 = 0x%x\n",omap_readl(SBL_PRV_RD_2 ));
////printk("SBL_PRV_RD_3 = 0x%x\n",omap_readl(SBL_PRV_RD_3 ));
////printk("SBL_PRV_WR_0 = 0x%x\n",omap_readl(SBL_PRV_WR_0 ));
////printk("SBL_PRV_WR_1 = 0x%x\n",omap_readl(SBL_PRV_WR_1 ));
////printk("SBL_PRV_WR_2 = 0x%x\n",omap_readl(SBL_PRV_WR_2 ));
////printk("SBL_PRV_WR_3 = 0x%x\n",omap_readl(SBL_PRV_WR_3 ));
////printk("SBL_PRV_DK_RD_0 = 0x%x\n",omap_readl(SBL_PRV_DK_RD_0 ));
////printk("SBL_PRV_DK_RD_1 = 0x%x\n",omap_readl(SBL_PRV_DK_RD_1 ));
////printk("SBL_PRV_DK_RD_2 = 0x%x\n",omap_readl(SBL_PRV_DK_RD_2 ));
////printk("SBL_PRV_DK_RD_3 = 0x%x\n",omap_readl(SBL_PRV_DK_RD_3 ));
////printk("SBL_RSZ_RD_0 = 0x%x\n",omap_readl(SBL_RSZ_RD_0 ));
////printk("SBL_RSZ_RD_1 = 0x%x\n",omap_readl(SBL_RSZ_RD_1 ));
////printk("SBL_RSZ_RD_2 = 0x%x\n",omap_readl(SBL_RSZ_RD_2 ));
////printk("SBL_RSZ_RD_3 = 0x%x\n",omap_readl(SBL_RSZ_RD_3 ));
////printk("SBL_RSZ1_WR_0 = 0x%x\n",omap_readl(SBL_RSZ1_WR_0 ));
////printk("SBL_RSZ1_WR_1 = 0x%x\n",omap_readl(SBL_RSZ1_WR_1 ));
////printk("SBL_RSZ1_WR_2 = 0x%x\n",omap_readl(SBL_RSZ1_WR_2 ));
////printk("SBL_RSZ1_WR_3 = 0x%x\n",omap_readl(SBL_RSZ1_WR_3 ));
////printk("SBL_RSZ2_WR_0 = 0x%x\n",omap_readl(SBL_RSZ2_WR_0 ));
////printk("SBL_RSZ2_WR_1 = 0x%x\n",omap_readl(SBL_RSZ2_WR_1 ));
////printk("SBL_RSZ2_WR_2 = 0x%x\n",omap_readl(SBL_RSZ2_WR_2 ));
////printk("SBL_RSZ2_WR_3 = 0x%x\n",omap_readl(SBL_RSZ2_WR_3 ));
////printk("SBL_RSZ3_WR_0 = 0x%x\n",omap_readl(SBL_RSZ3_WR_0 ));
////printk("SBL_RSZ3_WR_1 = 0x%x\n",omap_readl(SBL_RSZ3_WR_1 ));
////printk("SBL_RSZ3_WR_2 = 0x%x\n",omap_readl(SBL_RSZ3_WR_2 ));
////printk("SBL_RSZ3_WR_3 = 0x%x\n",omap_readl(SBL_RSZ3_WR_3 ));
////printk("SBL_RSZ4_WR_0 = 0x%x\n",omap_readl(SBL_RSZ4_WR_0 ));
////printk("SBL_RSZ4_WR_1 = 0x%x\n",omap_readl(SBL_RSZ4_WR_1 ));
////printk("SBL_RSZ4_WR_2 = 0x%x\n",omap_readl(SBL_RSZ4_WR_2 ));
////printk("SBL_RSZ4_WR_3 = 0x%x\n",omap_readl(SBL_RSZ4_WR_3 ));
////printk("SBL_HIST_RD_0 = 0x%x\n",omap_readl(SBL_HIST_RD_0 ));
////printk("SBL_HIST_RD_1 = 0x%x\n",omap_readl(SBL_HIST_RD_1 ));
////printk("SBL_H3A_AF_WR_0 = 0x%x\n",omap_readl(SBL_H3A_AF_WR_0 ));
////printk("SBL_H3A_AF_WR_1 = 0x%x\n",omap_readl(SBL_H3A_AF_WR_1 ));
////printk("SBL_H3A_AEAWB_WR_0 = 0x%x\n",omap_readl(SBL_H3A_AEAWB_WR_0));
////printk("SBL_H3A_AEAWB_WR_1 = 0x%x\n",omap_readl(SBL_H3A_AEAWB_WR_1));
////printk("SBL_SDR_REQ_EXP = 0x%x\n",omap_readl(SBL_SDR_REQ_EXP ));
//}
static void isp_CCDC_config(void)
{
//unsigned int data;
//int k,n;
//unsigned char * CptDataBuf;
//unsigned char* CptDataBuf_phy;
//printk("Before CptDataBuf = kzalloc(512 * 512, GFP_KERNEL)\n");
CptDataBuf =kzalloc(672 * 480, GFP_KERNEL); // kzalloc(512 * 512, GFP_KERNEL);
//CptDataBuf[10]=100;
////printk("CptData[10] = 0x%x\n", CptDataBuf[10]);
//printk("Exit CptDataBuf = kzalloc(512 * 512, GFP_KERNEL)\n");
//printk("Before CptDataBuf_phy = (unsigned char *)virt_to_phys(CptDataBuf)\n");
CptDataBuf_phy = (unsigned char *)virt_to_phys(CptDataBuf);
//printk("Exit CptDataBuf_phy = (unsigned char *)virt_to_phys(CptDataBuf)\n");
omap_writel(ENABLE(0), ISPCCDC_PCR);
/* CCDC_SYN_MODE */
//omap_writel(0x00030723,ISPCCDC_SYN_MODE);
omap_writel(SDR2RSZ(0) |
VP2SDR(1) |
WEN(1) |
VDHDEN(1) |
//FLDSTAT |
LPF(0) |
INPMOD(0) |
PACK8(1) |
DATSIZ(7) |
FLDMODE(0) |
DATAPOL(0) |
EXWEN(0) | //外部写使能信号
FLDPOL(0) |
HDPOL(0) |
VDPOL(0) |
FLDOUT(0) |
VDHDOUT(0)
,ISPCCDC_SYN_MODE);
omap_writel(SPH(0) | NPN(671), ISPCCDC_HORZ_INFO);
/* CCDC_VERT_START */
omap_writel(SLV0(0) | SLV1(0), ISPCCDC_VERT_START);
/* CCDC_VERT_LINES */
omap_writel(NLV(479), ISPCCDC_VERT_LINES);
/* CCDC_CULLING */
omap_writel(CULHEVN(0xff) |
CULHODD(0xff) |
CULV(0xff)
,ISPCCDC_CULLING);
/* CCDC_HSIZE_OFF */
omap_writel(LNOFST(672), ISPCCDC_HSIZE_OFF );
/* CCDC_SDOFST */
omap_writel(FIINV(0) |
FOFST(0) |
LOFST0(0) |
LOFST1(0) |
LOFST2(0) |
LOFST3(0)
,ISPCCDC_SDOFST );
/* CCDC_SDR_ADDR */
/* CCDC_CLAMP */
omap_writel(CLAMPEN(0) |
OBSLEN(0) |
OBSLN(0) |
OBST(0) |
OBGAIN(0)
,ISPCCDC_CLAMP);
/* CCDC_DCSUB */
omap_writel(DCSUB(0), ISPCCDC_DCSUB);
/* CCDC_BLKCMP */
omap_writel(R_YE(0) |
GR_CY(0) |
GB_G(0) |
B_MG(0)
,ISPCCDC_BLKCMP);
/* CCDC_FPC */
/* CCDC_FPC_ADDR */
//omap_writel( ADDR(a),ISPCCDC_FPC_ADDR );
omap_writel(FPERR(0) |
FPCEN(0) |
FPNUM(0)
,ISPCCDC_FPC);
/* CCDC_VDINT */
omap_writel(VDINT0(0) |
VDINT1(0)
,ISPCCDC_VDINT);
/* CCDC_ALAW */
omap_writel(CCDTBL(0) | GWDI(0), ISPCCDC_ALAW);
/**** CCDC_REC656IF */
omap_writel(ECCFVH(0) | R656ON(0), ISPCCDC_REC656IF);
/**** CCDC_CFG */
omap_writel(VDLC(1) |
MSBINVI(0) |
BSWD(0) |
Y8POS(0) |
WENLOG(0) |
FIDMD(1) |
BW656(0)
,ISPCCDC_CFG);
/**** CCDC_FMTCFG */
omap_writel(VPIF_FRQ(0) |
VPEN(0) |
VPIN(0) |
PLEN_EVEN(0)|
PLEN_ODD(0) |
LNUM(0) |
LNALT(0) |
FMTEN(0)
,ISPCCDC_FMTCFG);
/* CCDC_LSC_CONFIG */
omap_writel(GAIN_MODE_M(0) |
GAIN_MODE_N(0) |
BUSY(0) |
AFTER_REFORMATTER(0) |
GAIN_FORMAT(0) |
ENABLE(0)
,ISPCCDC_LSC_CONFIG);
//printk("Before omap_writel(CptDataBuf_phy, ISPCCDC_SDR_ADDR)\n");
omap_writel((unsigned long)CptDataBuf_phy, ISPCCDC_SDR_ADDR);
//printk("Exit omap_writel(CptDataBuf_phy, ISPCCDC_SDR_ADDR)\n");
/* CCDC_PCR config */
omap_writel(ENABLE(1), ISPCCDC_PCR);
// while(1)
// {
// msleep(1000);
// omap_writel( (~ENABLE(1))& omap_readl(ISPCCDC_PCR) ,ISPCCDC_PCR);
// printk("Kernel_CptDataBuf[400]=%02X\n",CptDataBuf[400]);
// omap_writel( ENABLE(1),ISPCCDC_PCR);
// }
}
static void pin_mux(void)
{
omap_writew((OFF_IN_PD | IEN | PTU | EN | M0),ISP_CONTROL_PADCONF_CAM_HS);
omap_writew((OFF_IN_PD | IEN | PTU | EN | M0),ISP_CONTROL_PADCONF_CAM_VS);
omap_writew((OFF_OUT_PD | IDIS | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_XCLKA);
omap_writew((OFF_IN_PD | IEN | PTU | EN | M0),ISP_CONTROL_PADCONF_CAM_PCLK);
omap_writew((OFF_OUT_PD | IDIS | PTD | DIS | M4),ISP_CONTROL_PADCONF_CAM_FLD);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D0);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D1);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D2);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D3);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D4);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D5);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D6);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D7);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D8);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D9);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D10);
omap_writew((OFF_IN_PD | IEN | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_D11);
//omap_writew((OFF_IN_PD | IEN | PTD | DIS | M4),ISP_CONTROL_PADCONF_CAM_WEN);
omap_writew((OFF_OUT_PD | IDIS | PTD | DIS | M0),ISP_CONTROL_PADCONF_CAM_XCLKB);
}
static void isp_initconfig(void)
{
//printk("Enter into isp_clk_config()\n");
isp_clk_config();
//printk("Exit isp_clk_config()\n");
//printk("Enter into isp_pin_config()\n");
isp_pin_config();
//printk("Exit isp_pin_config()\n");
//printk("Enter into pin_mux()\n");
pin_mux();
//printk("Exit pin_mux()\n");
//printk("Enter into isp_timing_config()\n");
isp_timing_config();
//printk("Exit isp_timing_config()\n");
//printk("Enter into isp_BridgeLane_config()\n");
isp_BridgeLane_config();
//printk("Exit isp_BridgeLane_config()\n");
//printk("Enter into isp_CCDC_config()\n");
isp_CCDC_config();
//printk("Exit isp_CCDC_config()\n");
//isp_SBL_config();
}
static int isp_open(struct inode *inode, struct file *file)
{
int minor;
minor = MINOR(inode->i_rdev);
cam_isp_devices[minor]++;
//printk(KERN_INFO "The camera isp device is opened!!!!!!\n");
return 0;
}
static int isp_release(struct inode *inode, struct file *file)
{
int minor;
minor = MINOR(inode->i_rdev);
if(cam_isp_devices[minor])
{
cam_isp_devices[minor]--;
}
//printk(KERN_INFO "The camera isp device is released!!!!!!\n");
return 0;
}
static ssize_t isp_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
{
return 0;
}
static ssize_t isp_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
{
unsigned long cnt;
int aa;
while(xieyuTag==0)
{
msleep(1);
}
omap_writel( (~ENABLE(1))& omap_readl(ISPCCDC_PCR) ,ISPCCDC_PCR); //stop CCDC
copy_to_user(buf, CptDataBuf, 512 * 512); //If it is smaller than 512*512, it
//cannot be copied to user layer. Why?
printk("Kernel_CptDataBuf[400]=%02X\n",CptDataBuf[400]); //Only after running “copy_to_user” above,
// can “Kernel_CptDataBuf[400]” be updated. Why?
xieyuTag=0;
omap_writel( ENABLE(1),ISPCCDC_PCR); //start CCDC
return count;
}
static int isp_ioctl(struct inode *inode, struct file *file, unsigned int command, unsigned long arg)
{
return 0;
}
static struct file_operations isp_fops = {
.owner = THIS_MODULE,
.read = isp_read,
.write = isp_write,
.open = isp_open,
.ioctl = isp_ioctl,
.release = isp_release,
};
static irqreturn_t isp_irq(int irq, void *dev_id)
{
if(omap_readl(ISP_IRQ0STATUS) & 0x80000000)
{
xieyuTag=1;
omap_writel(0x80000000, ISP_IRQ0STATUS);
}
else
{
printk("No HS_VS_IRQ\n");
}
// printk("camera isp irq!\n");
return 0;
}
static int __init isp_init(void)
{
int result;
result = register_chrdev(CAMERA_ISP_MAJOR, "ISP", &isp_fops);
isp_initconfig();
xieyuTag=0;
int ret = request_irq(24, (irq_handler_t)isp_irq, IRQF_TRIGGER_RISING, "Camera ISP", NULL);
if(ret)
{
printk("Wow!!! ISP interrupt install failed! \n");
return -1;
}
printk("request_irq() successfully registered!!!\n");
return 0;
}
static void __exit isp_exit(void)
{
free_irq(24,NULL);
unregister_chrdev(CAMERA_ISP_MAJOR,"ISP");
}
module_init (isp_init);
module_exit (isp_exit);
MODULE_AUTHOR("xxx");
MODULE_DESCRIPTION("OMAP35xx Camera ISP driver");
MODULE_LICENSE("GPL");
//-----------------------------isp.c--end-----------------------------------------------
//=====================================================================================================
//=====================================Question========================================================
Kernel Version:
Linux version 2.6.31-rc7-omap1
Question 1:
In isp_read(), instead of running : copy_to_user(buf, CptDataBuf, 512 * 512),
but run: printk("Kernel_CptDataBuf[400]=%02X\n",CptDataBuf[400]);
Then Kernel_CptDataBuf[400] will not be updated at all.
In isp_read(), run: copy_to_user(buf, CptDataBuf, 512 * 512);
Then run: printk("Kernel_CptDataBuf[400]=%02X\n",CptDataBuf[400]);
Then Kernel_CptDataBuf[400] will be updated basically, but usually only after it is
recalled 2~3 times, can isp_read() CptDataBuf[400] be updated once. That is to say,
the data is updated, but not in real time.
Question 2: Take the code isp.c in the case above for example, make changes like this:
In isp_init(), delete request_irq();
In isp_exit(), delete free_irq(24,NULL);
At the end of the function isp_CCDC_config(), add
while(1)
{
msleep(1000);
omap_writel( (~ENABLE(1))& omap_readl(ISPCCDC_PCR) ,ISPCCDC_PCR);
printk("Kernel_CptDataBuf[400]=%02X\n",CptDataBuf[400]);
omap_writel( ENABLE(1),ISPCCDC_PCR);
}
Run the command "busybox-omap insmod ./isp.ko"
Result: The printed Kernel_CptDataBuf[400] is not updated, but updated once after
waiting for over 10 minutes occasionally.
Remove the infinite loop from the codes above, and change to:
//while(1)
//{
msleep(1000);
omap_writel( (~ENABLE(1))& omap_readl(ISPCCDC_PCR) ,ISPCCDC_PCR);
printk("Kernel_CptDataBuf[400]=%02X\n",CptDataBuf[400]);
omap_writel( ENABLE(1),ISPCCDC_PCR);
//}
run it continuously
while(1)
{
system("busybox-omap rmmod isp.ko");
system("busybox-omap insmod ./isp.ko");
}
Result: the printed Kernel_CptDataBuf[400] is updated every time.
