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CCS/TMS320C5535: Processors forum

Part Number: TMS320C5535

Tool/software: Code Composer Studio

Hi all,

I'm working with custom TMS320C5535  DSP based board with stereo SPH0645LM4H-B mics. I'm having an issue with the  left mic data. The left mic data is having more noise than the right mic.

The right mic data is  having  music with lesser noise. The left mic data is full of noise only. 

I'm not getting what is the issue with the left mic. I found  that there is a difference in  timing diagrams of  I2S  of both TMS320C5535 and SPH0645LM4H-B mic. 

The SPH0645LMAH-B  mics sends data immediately after the WS signal falling edge without 1bit delay on the rising edge as shown in below timing diagram.

SPH0645LM4H I2S timing diagram:

Where as TMS320C5535 I2S config requires default 1bit delay after WS signal falling edge as shown in below timing diagram.

Hence we configured I2S  with following configuration where we have set 1bit delay and Falling edge data sampling (as shown below).

We are looking forward to get the solution for following issues.

 1) With the above I2S registers config, the right mic data is  having music with lesser noise. The left mic data is full of noise only. Is our I2S config programming correct?

2) How to match the timing requirements of  SPH0645LM4H-B mic in I2S register configuration to receive clean audio from mics?