Other Parts Discussed in Thread: SYSBIOS
Tool/software: Code Composer Studio
Dear Sirs:
We are using the AM5728EVM.
The SDK we used is ti-processor-sdk-rtos-am57xx-evm-06.00.00.07.
And we followed the below instructions to build the PDK for ipu1_0 to test the desired program.
ckhsu@DRA71X:~/ti-processor-sdk-rtos-am57xx-evm-06.00.00.07/pdk_am57xx_1_0_15/packages$ source ./pdksetupenv.sh
ckhsu@DRA71X:~/ti-processor-sdk-rtos-am57xx-evm-06.00.00.07/pdk_am57xx_1_0_15/packages$ make LIMIT_BOARDS="evmAM572x" LIMIT_SOCS="am572x" LIMIT_CORES="ipu1_0"
The program we tested is m2mVpeScale and the source code is placed in the directory: /home/ckhsu/ti-processor-sdk-rtos-am57xx-evm-06.00.00.07/pdk_am57xx_1_0_15/packages/ti/drv/vps/examples/vpe/m2mVpeScale.
Due to the tiler initialization needs to be aligned 256MB in the boundry and the original will be in the 0x90B00000, so the pdk_am57xx_1_0_15/packages/ti/build/am572x/config_am572x.bld needs to be modify the fit the memory.
We set the app cache data section from 20MB to 9MB as following as below.
/*APP_CACHED_DATA_SIZE = 20*MB;*/
APP_CACHED_DATA_SIZE = 9*MB;
The final memory layout as below and make the APP_CACHED_DATA_BLK2_ to align in 0x90000000, which make the data section ".bss:tilerBuffer" to align the boundary.
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
L2_ROM 00000000 00004000 000001a0 00003e60 RWIX
L2_RAM 20000000 00010000 00000000 00010000 RWIX
OCMC_RAM1 40300000 00080000 00000000 00080000 RWIX
OCMC_RAM2 40400000 00100000 00000000 00100000 RWIX
OCMC_RAM3 40500000 00100000 00000000 00100000 RWIX
APP_CODE_MEM 80001000 002ff000 0011d32a 001e1cd6 RWIX
APP_CACHED_DATA_MEM 80300000 00900000 004e618c 00419e74 RWIX
APP_CACHED_DATA_BLK1_ 80c00000 0f400000 0f200000 00200000 RWIX
APP_CACHED_DATA_BLK2_ 90000000 08000000 08000000 00000000 RWIX
APP_UNCACHED_DATA_BLK a0000000 00200000 0001d4c0 001e2b40 RWIX
2 tests are done:
1. The first is the original setting except for the input scan format and height we load a 720x480 NV12 data from sd card into memory and the demo code resize it into 360x240 YUYV422
#define VPE_IN_MEM_TYPE (VPS_VPDMA_MT_NONTILEDMEM)
#define VPE_IN_ORI_MODE (BSPUTILS_TILER_ORI_NONE)
#define VPE_IN_WIDTH (720U)
#define VPE_IN_HEIGHT (480U)
#define VPE_IN_SCAN_FORMAT (FVID2_SF_PROGRESSIVE)
#define VPE_NUM_IN_BUFFERS (1U)
This test ends without any problem and the expected result in vpe_output_files has no problem.
2. The second test we want to test on the tiler and this cause exceptions.
#define VPE_IN_MEM_TYPE (VPS_VPDMA_MT_TILEDMEM)
#define VPE_IN_ORI_MODE (BSPUTILS_TILER_ORI_X_FLIP)
All other setting are the same as test 1.
The output are as following:
[09:43:43:847] ␍*** VPDMA Firmware Loading... ***␍␍␊
[09:47:33:850] ␍VPDMA Firmware Address = 0xa001c4c0␍␍␊
[09:47:33:850] ␍VPDMA Load Address = 0x4897d004␍␍␊
[09:47:33:850] ␍VPDMA Firmware Version = 0x4d0001b8␍␍␊
[09:47:33:850] ␍VPDMA List Busy Status = 0x00000000␍␍␊
[09:47:33:850] ␍*** VPDMA Firmware Load Success ***␍␍␊
[09:47:33:850] ␍␍␍␊
[09:47:33:850] ␍*** VPDMA Firmware Loading... ***␍␍␊
[09:47:33:850] ␍VPDMA Firmware Address = 0xa001c4c0␍␍␊
[09:47:33:850] ␍VPDMA Load Address = 0x4899d004␍␍␊
[09:47:33:850] ␍VPDMA Firmware Version = 0x4d0001b8␍␍␊
[09:47:33:850] ␍VPDMA List Busy Status = 0x00000000␍␍␊
[09:47:33:850] ␍*** VPDMA Firmware Load Success ***␍␍␊
[09:47:33:850] ␍␍␍␊
[09:47:33:850] ␍*** VPDMA Firmware Loading... ***␍␍␊
[09:47:33:903] ␍VPDMA Firmware Address = 0xa001c4c0␍␍␊
[09:47:33:903] ␍VPDMA Load Address = 0x489bd004␍␍␊
[09:47:33:903] ␍VPDMA Firmware Version = 0x4d0001b8␍␍␊
[09:47:33:903] ␍VPDMA List Busy Status = 0x00000000␍␍␊
[09:47:33:903] ␍*** VPDMA Firmware Load Success ***␍␍␊
[09:47:33:903] ␍␍␍␊
[09:47:33:903] ␍*** VPDMA Firmware Loading... ***␍␍␊
[09:47:33:903] ␍VPDMA Firmware Address = 0xa001c4c0␍␍␊
[09:47:33:903] ␍VPDMA Load Address = 0x489dd004␍␍␊
[09:47:33:903] ␍VPDMA Firmware Version = 0x4d0001b8␍␍␊
[09:47:33:903] ␍VPDMA List Busy Status = 0x00000000␍␍␊
[09:47:33:903] ␍*** VPDMA Firmware Load Success ***␍␍␊
[09:47:33:903] ␍␍␍␊
[09:47:33:903] ␍ ␍␍␊
[09:47:34:018] ␍ Build time : [09:10:09 Sep 19 2019]␍␍␊
[09:47:34:018] ␍ FVID2 Version : [FVID_02_01_00_01]␍␍␊
[09:47:34:018] ␍ BSP Version : [PDK_01_10_00_xx]␍␍␊
[09:47:34:018] ␍ Platform : [EVM]␍␍␊
[09:47:34:018] ␍ SOC : [AM572X]␍␍␊
[09:47:34:018] ␍ SOC Revision : [ES1.1]␍␍␊
[09:47:34:018] ␍ FT Revision : [11]␍␍␊
[09:47:34:018] ␍ Package : [UNKNOWN]␍␍␊
[09:47:34:018] ␍ Core : [M4]␍␍␊
[09:47:34:018] ␍ Board Detected : [AM572X GP EVM]␍␍␊
[09:47:34:018] ␍ EEPROM Base Board Name: [AM572PM_]␍␊
[09:47:34:018] ␍ Base Board Revision : [REV A]␍␍␊
[09:47:34:018] ␍ Daughter Card Revision: [REV A]␍␍␊
[09:47:34:033] ␍ ␍␍␊
[09:47:34:033] ␍AppVpeScale: VPE In Buffer Address : 0x80c00000, Size: 0x278d00␍␍␊
[09:47:34:070] ␍AppVpeScale: VPE-WB Out Buffer Address: 0x80e78d00, Size: 0xd2f00␍␍␊
[09:47:34:070] ␍AppVpeScale: Load 5 YUV420SP_UV video frames/fields of size 720x480 to location: 0x80c00000␍␍␊
[09:47:34:070] ␍Trying to Load buffer from SD card. ␍␍␊
[09:47:34:070] ␍Loading File IMAG0465_720x480.NV12.yuv from SD Card...␍␍␊
[09:47:34:070] ␍File Size: 518400 bytes, Time Taken: 169 ms!!␍␍␊
[09:47:34:245] ␍AppVpeScale: Copying input buffer (0x80c00000) to tiler space...␍␍␊
[09:48:56:726] ␍
After the demo program try to load the image from input buffer into tiler memory, then it crashed with the below in the CCS:
[Cortex_M4_IPU1_C0] ti.sysbios.family.arm.m3.Hwi: line 1158: E_hardFault: FORCED
ti.sysbios.family.arm.m3.Hwi: line 1235: E_busFault: IMPRECISERR: Delayed Bus Fault, exact addr unknown, address: e000ed38
Exception occurred in background thread at PC = 0x800d4a62.
Core 0: Exception occurred in ThreadType_Task.
Task name: {unknown-instance-name}, handle: 0x80731590.
Task stack base: 0x807b47e0.
Task stack size: 0x2800.
R0 = 0x60000020 R8 = 0xffffffff
R1 = 0x00000001 R9 = 0xffffffff
R2 = 0x807b6eb0 R10 = 0xffffffff
R3 = 0x00000000 R11 = 0xffffffff
R4 = 0xffffffff R12 = 0x18bd0300
R5 = 0xffffffff SP(R13) = 0x807b6e90
R6 = 0xffffffff LR(R14) = 0x800d4a07
R7 = 0xffffffff PC(R15) = 0x800d4a62
PSR = 0x21000000
ICSR = 0x0440f803
MMFSR = 0x00
BFSR = 0x04
UFSR = 0x0000
HFSR = 0x40000000
DFSR = 0x00000001
MMAR = 0xe000ed34
BFAR = 0xe000ed38
AFSR = 0x00000000
Terminating execution...
We know the AM572xEVM can run tiler in OMAPDRM in linux platform, and how we can test tiler in RTOS platform by using this program?
The CCS setting are Version: 9.1.0.00010 :
1. GP5728EVM
2. XDS100 rev2 USB
After launch the target setting:
1. Connect to A15 0, and from the CCS console the PRCM/All slave cores are enabled by default.
2. Connect to IPU 1_0
3. load pdk_am57xx_1_0_15/packages/ti/binary/vps_examples_m2mVpeScale/bin/evmAM572x/vps_examples_m2mVpeScale_ipu1_0_debug.xem4
4. free run
Any comments are welcome.
Sincerely,
/ckhsu
