Hi,
The omap 3530 architecture consists of 720 MHz arm cortex A8 and 520 MHz C64X DSP and ISP. Here arm cortex core will provide support for faster execution using its SIMD instruction or neon intrinsics. My doubt is how can i use the C64x dsp processor for the faster execution. Since the modules of parallel execution is optimized using neon intrinsics but how can i optimize the sequential modules. Is there any specific instruction or methods for using C64x.
I have one more doubt. In some application for example an image viewer many number of times execute the functions like transform operations. How can i place the function in Cache memory permanantly by creating the sections for avoid the multiple load and unload from the cache.
when i increase the critical function size by merging the performence is hited. when check the assembly there is lot of stack specific load and store. Here what is the role of cache memoory to hit the performence.
Thanks in advance.
Dave