DRA750: Disabling DSP clock frequency from Kernel

HI Yordan,

Thank you for your link.

Actually In our case Kernel is modifying the clock frequency using DTB, But we dont want Kernel to touch registers .

Please let me know procedure that kernel should not access it.

Thanks and Regards,

Vivek

Hi Vivek,

By default u-boot updates the kernel dtb during load time for remotecore clock frequencies (DSP, IPU, GPU, etc..)
You select the desired DSP OPP value using u-boot defconfig, by default we have set OPP_HIGH for DSP.

# CONFIG_DRA7_DSPEVE_OPP_NOM is not set
# CONFIG_DRA7_DSPEVE_OPP_OD is not set
CONFIG_DRA7_DSPEVE_OPP_HIGH=y

Based on OPP selected, below dtb entries are updated for assigned-clock-rates value.

"dpll_dsp_ck",
"dpll_dsp_m2_ck",
"dpll_dsp_m3x2_ck",

Regards,
Vishal

HI Vishal,

Thank you Vishal, we have checked internally   we are using IPL which  is totally different from TI-UBOOT which doesn't have capabilities to modify DTB.

We have checked kernel we have found one more approach by setting clock to zero. if clock is set to zero it will untouch registers.

diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index b9ac7ea..c88365f 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -339,7 +339,7 @@
                clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
                reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;
                assigned-clocks = <&dpll_dsp_ck>;
-               assigned-clock-rates = <600000000>;
+               assigned-clock-rates = <0>;
        };


Please let us know does it have any impact.

Thanks and Regards,

Vivek

HI Vishal,

Thank you Vishal, we have checked internally   we are using IPL which  is totally different from TI-UBOOT which doesn't have capabilities to modify DTB.

We have checked kernel we have found one more approach by setting clock to zero. if clock is set to zero it will untouch registers.

diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index b9ac7ea..c88365f 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -339,7 +339,7 @@
                clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
                reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;
                assigned-clocks = <&dpll_dsp_ck>;
-               assigned-clock-rates = <600000000>;
+               assigned-clock-rates = <0>;
        };


Please let us know does it have any impact.

Thanks and Regards,

Vivek

Hi Vivek,

Let me check and get back if this method is OK or if there is any other method to do the same.

Do you have below properties for DSP node in Kernel dtb?

ti,no-idle-on-init;
ti,no-reset-on-init;


Regards,
Vishal

HI Vishal ,

We have that property for other device node, but not for DSP.

But we have found one more way , once we set DSP clock assigned-clock-rates  to zero(0) . it is getting untoched.

    dpll_dsp_ck: dpll_dsp_ck {
        #clock-cells = <0>;
        compatible = "ti,omap4-dpll-clock";
        clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
        reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;
        assigned-clocks = <&dpll_dsp_ck>;
        assigned-clock-rates = <0>;
    };

please consider above one also. weather it is a right way to do.

Thanks and Regards,

Vivek

Hi Vivek,

Could you try adding the property to DSP node and see if it makes any difference?

Regards,
Vishal

Hi Vivek,

Ignore the previous comment, those properties will not affect the clocking part.

Recommendation from TI is to match the dts property in kernel dtb to the value you are setting in bootlaoder.
Do you have any concerns for matching it?


Regards,
Vishal

Hi Vishal,

We have one concern here The requirement is DSP clock frequency should always be  controlled by Boot-loader. Even though if we try to match the value DTB values to boot-loader, But Boot-loader can change values at any time, it could cause an overhead in kernel to change values respectively.

Is there any other way to  do it?

Thanks and Regards,

Vivek

Hi Vivek,

Would you be changing DSP frequency at runtime in IPL?

Regards,
Vishal