DM355_PLLDIV3

you can change it in uboot. or use it in kernel like this:

*(uint32*)IO_ADDRESS(phy_addr) = value;

the register can be found in sprufb3.pdf

Dear liu, thanks for quick reply....

     Im sorry for a silly question but im new in kernel programming and device driver programming. Can I use this syntax in any related file which is used in kernel compilation or is there any particular file in which i have to use it? I have already seen the registers in spurfb3.pdf and I am clear conceptually. The only problem I am facing is in locating the file in Montavista which contains this register settings.

Hi Mohammad,

            Clock settings are usually done inside the UBL source code . UBL source code is a part of  davinci psp release package . Just look for the file 'device.c' inside the arm UBL source, modify the PLL settings and then compile and flash the UBL binary. No changes are needed in the u-boot and kernel. Let me know if you need further clarification.

Regards,

N.Sugumar

 Continued....

     The u-boot and kernel  use the clock settings done in UBL.  The  function 'davinci_clk_init'  in the file 'arch/arm/mach-davinci/clock.c'  in the kernel reads the PLL settings and calculates the  clock rate of  the various peripherals in the device. If you wish to change  the PLL settings  in the kernel, do the same( write to the register directly using ioremap)  prior to this function call . For eg,  dm355_init function in the file arch/'arm/mach-davinci/dm355.c.

Regards,

N.Sugumar

Hi Mohammad,

      Please try the following changes in the kernel to change the clock settings. I assume you want to change the pll1_sysclk3 .

1. Add the following (Highlighted...)in the clock structure

static struct clk pll1_sysclk3 = {

.name = "pll1_sysclk3",

.parent = &pll1_clk,

 .flags = CLK_PLL,

.div_reg = PLLDIV3,

.set_rate       = davinci_set_sysclk_rate,

.maxrate        = 100000000,       //Specify the maximum frequency supported

}

2.  Include the function call in the dm355_init fn

    void __init dm355_init(void)

{

davinci_common_init(&davinci_soc_info_dm355);

clk_set_rate(&pll1_sysclk3, 100000000);  //Pass the  required frequency in the 2nd arg.

}

PS:

 I have tested this only on omap-l138.

Regards,

N.Sugumar

Dear Natrajan,

    Thank you very much for your support.... I will check it soon and will let you know about the result......

Hi Mohammed,

            Sorry. Whatever i mentioned in the previous post is meant for the latest kernel. Those files may not present in the kernel  you are having. So, please have those file as reference and make the changes accordingly. Let me know in case if you face any difficulties.

Regards,

N.Sugumar

Thanks Sugumar,

     Yes you are right I don't have those files exactly in my kernel and i am facing difficulty in finding the related file. Still I am working on that and also I am having other projects in my hand so i have to divide my time in that also. I will definitely let you know whatever progress I will make and will surely ask you for your help in that. Thank you very much for your support and concern....