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AM3357: Trace pins configuration

Maciej Andrzejewski
Prodigy 55 points
Part Number: AM3357

As described by James in this post:
e2e.ti.com/.../498265

I would like to configure EMU pins as clock and data ports.

I have used below code to configure those pins but accessing any address starting from 0x4B160000 (DebugSS_DRM) is unavailable and in result triggers data abort.
I tried configuring MMU for that memory address part but it ends up same way.
There is absolutely no documentation for that part of chip.
I do not want to use CCS or GEL files - I need to embedded this into application.

I have contacted support about documentation (which might need NDA to access - which I have) but they asked me to make another thread on E2E :/

static void trace(void)
{
    volatile unsigned int* debugSS_DRM = (volatile unsigned int*)0x4B160000;
    volatile unsigned int* dpmCtrlReg = (volatile unsigned int*)(0x4B160080);
    volatile unsigned int* dpm_emu0 = (volatile unsigned int*)&dpmCtrlReg[0];
    volatile unsigned int* dpm_emu1 = (volatile unsigned int*)&dpmCtrlReg[1];

    unsigned int reg = *dpm_emu0;
    reg &= ~(0xFF);
    reg |= 0x6;
    *dpm_emu0 = reg;

    reg = *dpm_emu1;
    reg &= ~(0xFF);
    reg |= 0x2;
    *dpm_emu1 = reg;
}

  • 0
    TI__Guru* 87040 points

    Hi Maciej, most likely the problem is the debug subsystem clock is not enabled.  Check register CM_WKUP_DEBUGSS_CLKCTRL (0x44E00414).  MODULEMODE should be 0x2 to enable the module.  Verify with the associated status bits in that register, along with CM_L3_AON_CLKSTCTRL.CLKACTIVITY_DEBUG_CLKA

    Regards,

    James

  • 0 in reply to JJD
    Prodigy 55 points

    I have enabled the clocks and checked the status bits and it looks good but still I can not read the register.
    Below I attach modified code with read values in comments.

    Where is documentation for DPM Control Register?

    #include "hw_cm_wkup.h"
static void trace(void)
{
    HWREG(SOC_CM_WKUP_REGS + CM_WKUP_DEBUGSS_CLKCTRL) =
            CM_WKUP_DEBUGSS_CLKCTRL_MODULEMODE_ENABLE |
            CM_WKUP_DEBUGSS_CLKCTRL_OPTFCLKEN_DBGSYSCLK |
            CM_WKUP_DEBUGSS_CLKCTRL_OPTCLK_DEBUG_CLKA;

    HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CM_L3_AON_CLKSTCTRL) =
            CM_WKUP_CM_L3_AON_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

    unsigned int debugSS_ClkCtrl_val = HWREG(SOC_CM_WKUP_REGS + CM_WKUP_DEBUGSS_CLKCTRL);          // == 0x40080002

    unsigned int l3_aon_clkstctrl_val = HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CM_L3_AON_CLKSTCTRL);    // == 0x1e

    volatile unsigned int* debugSS_DRM = (volatile unsigned int*)0x4B160000;
    volatile unsigned int* dpmCtrlReg = (volatile unsigned int*)(0x4B160080);
    volatile unsigned int* dpm_emu0 = (volatile unsigned int*)&dpmCtrlReg[0];
    volatile unsigned int* dpm_emu1 = (volatile unsigned int*)&dpmCtrlReg[1];

    unsigned int reg = *dpm_emu0;    // <--- THIS generates Data Abort
    reg &= ~(0xFF);
    reg |= 0x6;
    *dpm_emu0 = reg;

    reg = *dpm_emu1;
    reg &= ~(0xFF);
    reg |= 0x2;
    *dpm_emu1 = reg;
}

  • 0 in reply to Maciej Andrzejewski
    TI__Guru* 87040 points

    Maciej, can you contact your local FAE by email?  Have him contact me and let's try to resolve via email.

    Thanks,

    James

  • 0 in reply to JJD
    Prodigy 55 points

    Yes JJD, Iv contacted Jamal, Karim few days ago - waiting for reply.

  • 0 in reply to Maciej Andrzejewski
    TI__Guru* 87040 points

    We have linked up offline.  Closing this thread.

    James