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Compiler/AM6548: MCAN bit timing

Part Number: AM6548

Tool/software: TI C/C++ Compiler

Hi,

Please see below thread regarding bit timing of MCAN:

https://e2e.ti.com/support/processors/f/791/p/796255/2945881

- What are the rules regarding the selection of the " bitTimes.nomTimeSeg1" , " bitTimes.nomTimeSeg2" and "bitTimes.nomSynchJumpWidth" for the AM6548?

- I understand that the equation to calculate bit timing is as follow: 

bit rate = (mcan_clk / bitTimes.nomRatePrescalar + 1) / (TimeSeg1 + TimeSeg2 + 3) ? Is this calculation correct? How does the SynchJumpWidth then influence the calculation?

I look forward to hearing from you!

Regards,

Johnny

  • Hi Johnny,

    Would you please clarify what software and version you are using. Thank you.

  • Hi Ron,

    This is software provided in the gatewayapp example provided with Processor SDK RTOS for am65x v6_00_00_07.

    PDK am65x v1_0_5 is also used.

    The example project can be located from C:\ti\processor_sdk_rtos_am65xx_6_00_00_07\demos

  • Hi Johnny,

    According to the AM65xx TRM (12.4.4.5.2.3 MCAN_DBTP Register (Offset = Ch) [reset = A33h]), the formula in your post is correct.

    Therefore the length of the bit time is (programmed values) [MCAN_DBTP[12-8] DTSEG1 +

    MCAN_DBTP[7-4] DTSEG2 + 3] tq

     

    The SJW is used for the Oscillator tolerance. It is part of the DTSEG1 or DTSEG2, so it has no effect on the bit rate computation. 

     

    Best regards,

     

    Ming

  • Hi Jonny,

    According to the AM65xx TRM:

    The MCAN_DBTP[12-8] DTSEG1 field is the sum of Prop_Seg and Phase_Seg1. The MCAN_DBTP[7-4] DTSEG2 field is Phase_Seg2.

    Where the sampling point for bit n is between the Phase_Seg1 and Phase_Seg2. The Synchronization Jump Width (SJW) adjusts the bit clock as necessary by 1 - 15TQ (as configured) to maintain synchronization with the transmitted message.

    The above will determine the values for the DTSEG1, DTSEG2 and DSJW.

    Best regards,

    Ming

  • Thanks so much for your reply Ming!