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AM5728: eQEP time base

Part Number: AM5728

Hello,

I'm using the eQEP on the AM5728 for motion control (bare metal application on C66).
The eQEP is set up properly and working basically fine.
Positions changes are signalled correctly from eQEP via EQepRegs.QEPSTS & CSL_EQEP_QEPSTS_UPEVNT_MASK and positions can be read correctly from EQepRegs.QPOSCNT.
I have proved this carefully by driving my quad encoder with an external precision drive and compared the results with an additional shaft mounted high resolution EnDAT encoder.
So far so good.

Additionally I want to measure the velocity of my encoder with the eQEP.

First I measured the speed with edge capturing. At each position update event I read EQepRegs.QCPRD but the results have an unexpected scaling factor.
I give an exact frequency into the eQEP and double checked this by scope on the eQEP inputs and by counting the positions over a time period given by an peripheral timer (Timer 4).
My input is correct, but the time between two edges captured by the eQEP has to much ticks (factor 20/3).
 
Next I used the unit time out and this time not the time between two edges is captured, but the number of edges within an UTO is counted by the eQEP.
Again the result have to be multiplied by the factor 3/20 to be correct. So the time of event counting seems to be to large by the factor 20/3, because the position rate per time is correct.

Given from the data sheet I thought the clock input of the eQEP timer is 20 MHz. May be I'm wrong...
The measurements show the eQEP timer clock can not be 20 MHz (SYSCLKOUT) and not 48 MHz (PWMSS1 funtional clock = PWMSS1_GICLK = L4PER2_L3_GICLK/2).

At least I wanted to measure the eQEP timer clock.
For this purpose I let QUTMR run freely and read out its value each second.
That proved the eQEP timer runs much much faster than expected. I want to get my measured value confirmed.

Please specify the eQEP timer clock frequency.

Notes:
I configured
- EQEP_QCAPCTL_UPPS to EN_0X0 // 1/1 for unit position
- EQEP_QCAPCTL_CCPS to EN_0X0 // 1/1 for CAP clock

The entire SOC (especially PRCM) is configured with the target configuration scripts for the IDK_AM572X.

Thank you.

Regards Dirk

  • Hi Dirk,

    I am looking into your question and will follow up in the next day or two.

    Regards,

    Melissa

  • Hello Melissa,

    you may check your assumption about the eQEP timer clock with the following source code:

    #include <stdint.h>
    #include <stdio.h>
    #include "ti/csl/soc.h"
    #include "ti/csl/cslr_eqep.h"

    void main( void )
    {
      CSL_EqepRegs &EQepRegs = *(CSL_EqepRegs *)SOC_PWMSS1_IEQEP_BASE;

      EnableModuleClock( (uint32_t)&EQepRegs );

      EQepRegs.QUPRD = 0xFFFFFFFF;                                  // max period
      CSL_FINST( EQepRegs.QEPCTL,  EQEP_QEPCTL_FREE_SOFT, EN_0X2 ); // unaffected by emulation suspend
      CSL_FINST( EQepRegs.QEPCTL,  EQEP_QEPCTL_UTE,       EN_0X1 ); // unit timeout Enable
      CSL_FINST( EQepRegs.QEPCTL,  EQEP_QEPCTL_PHEN,      EN_0X1 ); // QEP enable
     
      uint32_t ts = 0;
     
      while( 1 )
      {
        if( GetSysTicks() > (ts + 1000) )
        {
          ts = GetSysTicks();
          printf( "utmr %u\r\n", EQepRegs.QUTMR );
        }
      }
    }

    Regards Dirk