TDA4VMXEVM: Camera MIPI D-PHY THS-SETTLE Calculation

Hi Kim,

Did the sensor resolution or frame rate change from the TDA2Px sensor board and the TDA4 sensor board? If not, then can you please put the same sensor board configuration for TDA4 as TDA2Px. In this case, try to change DPHY configuration towards TDA4 only. You don't need to change any sensor configurations.

Can you please share your TDA4 DPHY(CSIRX) configuration? We should be able to get this working by changing DPHY configuration towards TDA4 only. 

Thanks & Regards,
Vivek Dhande.

Texas Instruments (India) Pvt Ltd

Hi Vivek,

The sensor configurations of TDA2Px and TDA4 are all the same. So frame rates should be same.

psdkra v0.91 was used and no changes for configurations of CSIRX D-PHY of TDA4.

Thanks and regards,
HJ Kim

Hi Kim,

    May I know the exact changes done in the sensor and DPHY configurations?

Also, we should get it working w/o changing anything in sensor configurations. Only changes in DPHY configuration shall be sufficient.

Thanks & Regards,
Vivek Dhande.

Texas Instruments (India) Pvt Ltd

Hi Vivek,

There's no information about the changes of sensor configurations.
Sensor configurations provided by sensor maker were used as it is for each sensor chip revision.

The D-PHY configuration was used as it is in psdk v0.91.

As you commented, more general D-PHY configurations are necessary.
And detailed information such as THS-SETTLE calculation is necessary as well.

Thanks and regards,
HJ Kim

Hi Kim,

    May I know the exact changes done in the TDA4x (DPHY) configurations?

Thanks & Regards,

Vivek Dhande.

Texas Instruments (India) Pvt Ltd

Hi Vivek,

I did NOT change any configurations of TDA4 D-PHY.
I wanted to do it, but I could not find any detailed information about THS-SETTLE in TDA4 TRM.
All configurations of TDA4 D-PHY were used as it is in psdk v0.91

I tried testing by changing configurations of image sensor.

Regards,
HJ

Hi Kim,

    What did you exactly change in the image sensor configurations to make this work?

Thanks & Regards,

Vivek Dhande.

Texas Instruments (India) Pvt Ltd

Hi Vivek,

I changed only PLL parameters of sensor.

It is assumed that  current THS-SETTLE of tda4 d-phy in psdk v0.91 is too long to be compatible with the sensor output.

Anyway, THS-SETTLE can not be fixed and it should be tuned with the output signal of image sensor or de-serializer.
The calculation methodology of THS-SETTLE of tda4 should be provided by TI.

Regards,
HJ

Hi Kim,

    I do not have THS-SETTLE calculations available now. Let me check and will get back to you.

Thanks & Regards,

Vivek Dhande.

Texas Instruments (India) Pvt Ltd

Hi Kim,

just to update you - Vivek is out of office and will reply next week. Sorry for the inconvenience.

Regards,

Yordan

Hi Kim,

    I just got back from a vacation. I am still checking with the concerned person. Thank you for your patience.

Thanks & Regards,

Vivek Dhande.

Texas Instruments (India) Pvt Ltd

Hi Kim,

Can you please tell me what exactly you have changed from the register contents perspective?

Thanks & Regards,

Vivek Dhande.

Texas Instruments (India) Pvt Ltd

Hi Vivek,

I changed THS-SETTLE of image sensor.
I'd like to know the methodology of changing THS-SETTLE of TDA4.

Regards,
HJ Kim

Hi Kim,

After speaking with a concerned person, you should not change the HS-Settle value in CSIRX PHY unless it out of MIPI specs. CSIRX PHY module internally takes care of this if the HS-Settlt is within MIPI specs.

Can you please tell me from what value to what value did you change the HS-Settle value towards the sensor?

Thanks & Regards,

Vivek Dhande.

Texas Instruments (India) Pvt Ltd

Hi Vivek,

THS-SETTLE value is not fixed in MIPI D-PHY spec. Typically it is tuned at RX side.

There're descriptions of it in TDA2Px as following, but not in TDA4.

THS_SETTLE timing parameter in multiples of DDR clock frequency.
Effective THS_SETTLE seen on line (starting to look for sync pattern) = synchronizer delay + timer delay + LPRX delay + combinational routing delay – pipeline delay in HS data path ~ (1–2)* DDRCLK + THS-SETTLE + ~ (1–15) ns –1*DDRCLK.
Programmed value = floor(105 ns/DDR_CLK) + 4, where DDR_CLK is the period of the CSI-2 I/O lane rate.
Default value: 39 (for 400 MHz).
Minimum supported THS-SETTLE programmed value = 3.

I don't have its data of sensor side. Sensor maker didn't provided one.
But it can be measured by oscilloscope and applied to RX side.

Regards,
HJ Kim

Hi Vivek,

Thank you for your support.

I think the configuration of THS-SETTLE should be described in TRM document.

Regards,
HJ Kim