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TDA2SX: Audio clock need to generate from BCLK

Part Number: TDA2SX
Other Parts Discussed in Thread: TDA2

Hi All

I am Working on TDA2XX custom board.

I am facing issue with audio clock generation with help of BCLK.

my requirement is "I2S run on 48KHz sample rate stereo 24bits format, that is BCLK should be 3.072MHz"

I am using below devicetree to generate the clock

        sound0: sound0 {
                compatible = "simple-audio-card";
                status = "okay";
                simple-audio-card,name = "CS48L32";
                simple-audio-card,widgets =
                        "Headphone", "Headphone Jack",
                        "Line", "Line Out",
                        "Microphone", "Mic Jack",
                        "Line", "Line In";
/*
                simple-audio-card,routing =
                        "ASP TX1 Source",       "ASPTX1",
                        "ASP TX3 Source",       "ASPTX3",
                        "ASPRX1",               "VPMON ADC",
                        "ASPRX1",               "VBSTMON ADC",
                        "AMP Playback",         "ASPRX1",
                        "Main AMP",             "SPK",
                        "CLASS H",              "PCM Source"; */

                simple-audio-card,format = "i2s";
                simple-audio-card,bitclock-master = <&sound0_master>;
                simple-audio-card,frame-master = <&sound0_master>;
                simple-audio-card,mclk-fs = <256>;

                 sound0_master: simple-audio-card,cpu {
                        sound-dai = <&mcasp2>;
                        system-clock-frequency = <3072000>;
                };

                simple-audio-card,codec {
                        sound-dai = <&cs35l41_l>
                };

        };

But, audio is not working and with help fo aplay -vvv .wav file,it's playing very fast.

Can you please help me,where i am wrong ?

Thanks & Regards,

Sankar.

  • Sankar,

    Could you please also share your current ATL and McASP2 dts nodes? The clock fed into McASP is routed from DPLL_ABE through ATL, so appropriate clocks rates should be set there as well.

    Do you happen to know the exact BCLK rate you're generating with your current configuration (i.e. probed with an oscilloscope)?

  • Hi,

    Thanks for your quick reply.

    1. Please look into below  ATL and MCASP2 dts nodes.

    &atl {
    /*
            assigned-clocks = <&abe_dpll_sys_clk_mux>,
                              <&atl_gfclk_mux>,
                              <&dpll_abe_ck>,
                              <&dpll_abe_m2x2_ck>,
                              <&atl_clkin1_ck>,
                              <&atl_clkin2_ck>;
            assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
            assigned-clock-rates = <0>, <0>, <180633600>, <361267200>,
                                    <11289600>, <11289600>;
    */

            status = "okay";

            atl2 {
                    bws = <DRA7_ATL_WS_MCASP2_FSX>;
                    aws = <DRA7_ATL_WS_MCASP3_FSX>;
            };
    };


    &mcasp2 {
            #sound-dai-cells = <0>;
    /*      assigned-clocks = <&mcasp1_ahclkx_mux>;
            assigned-clock-parents = <&atl_clkin2_ck>; */

            status = "okay";

            op-mode = <0>;
            tdm-slots = <2>;

            serial-dir = <   
                    1 2 0 0
            >;
            tx-num-evt = <32>;
            rx-num-evt = <32>;
    };

    In my schematic,I am not using XREF_CLKn and mcasp2_ahclkx for generating the clock.

    I am using ASP lines are MCASP2_AXR1,MCASP2_AXR0,MCASP2_FSX,MCASP2_ACLKX.

    2.With current configuration I am getting BCLK is 20 MHz.

     

    Thanks & Regards,

    Sankar.

  • Sankar,

    The BCLK generated by McASP can be derived from an internal or external AHCLK. Here internal and external is from McASP peripheral point of view, not SoC point of view.

    The internal source of AHCLK comes from MCASP2_AUX_GFCLK (which can in turn be sourced from DPLL_ABE, HDMI_CLK or VIDEO1_CLK). The external source of AHCLK comes from PRCM MCASP2_AHCLKX (which can be derived from multiple sources, please refer to "CM_CORE_AON_MCASP2 Clock Manager Overview" in TRM for possible sources).

    I'd suggest that you try sourcing AHCLK from MCASP2_AHCLKX. First, you'd need to set the DPLL_ABE to a frequency appropriate for 48kHz audio, i.e. 122.88MHz and configure ATL clock rate to an intermediate frequency that McASP can internally divide further down.

    &atl {
            assigned-clocks = <&abe_dpll_sys_clk_mux>,
                              <&atl_gfclk_mux>,
                              <&dpll_abe_ck>,
                              <&dpll_abe_m2x2_ck>,
                              <&atl_clkin1_ck>;
            assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
            assigned-clock-rates = <0>, <0>, <122880000>, <245760000>,
                                    <12288000>;
    
            status = "okay";
    
            atl2 {
                    bws = <DRA7_ATL_WS_MCASP2_FSX>;
                    aws = <DRA7_ATL_WS_MCASP3_FSX>;
            };
    };

    &mcasp2 {
            #sound-dai-cells = <0>;
            assigned-clocks = <&mcasp2_ahclkx_mux>;
            assigned-clock-parents = <&atl_clkin1_ck>;
    
            status = "okay";
    
            op-mode = <0>;
            tdm-slots = <2>;
    
            serial-dir = <   
                    1 2 0 0
            >;
            tx-num-evt = <32>;
            rx-num-evt = <32>;
    };

            sound0: sound0 {
                    ...
                    sound0_master: simple-audio-card,cpu {
                            sound-dai = <&mcasp2>;
                            system-clock-frequency = <12288000>;
                    };
                    ...
            };

    Basically, DPLL_ABE (122.88MHz) -> ATL (12.288MHz) -> McASP_AHCLK (12.288MHz) -> McASP_ACLK (3.072MHz).

    Above doesn't imply/require that MCASP2_AHCLKX has to be routed outside TDA2 SoC.

    Hope this helps.

  • Hi,

    Now i modified dts file below.

    &atl {
            assigned-clocks = <&abe_dpll_sys_clk_mux>,
                              <&atl_gfclk_mux>,
                              <&dpll_abe_ck>,
                              <&dpll_abe_m2x2_ck>,
                              <&atl_clkin1_ck>;
            assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
            assigned-clock-rates = <0>, <0>, <122880000>, <245760000>,
                                    <12288000>;

            status = "okay";

            atl2 {
                    bws = <DRA7_ATL_WS_MCASP2_FSX>;
                    aws = <DRA7_ATL_WS_MCASP3_FSX>;
            };
    };

    &mcasp2 {
            #sound-dai-cells = <0>;
            assigned-clocks = <&mcasp2_ahclkx_mux>;
            assigned-clock-parents = <&atl_clkin1_ck>;

            status = "okay";

            op-mode = <0>;
            tdm-slots = <2>;

            serial-dir = <   
                    1 2 0 0
            >;
            tx-num-evt = <32>;
            rx-num-evt = <32>;
    };

            sound0: sound0 {
                    compatible = "simple-audio-card";
                    status = "okay";
                    simple-audio-card,name = "CS48L32";
                    simple-audio-card,widgets =
                            "Headphone", "Headphone Jack",
                            "Line", "Line Out",
                            "Microphone", "Mic Jack",
                            "Line", "Line In";
    /*
                    simple-audio-card,routing =
                            "ASP TX1 Source",       "ASPTX1",
                            "ASP TX3 Source",       "ASPTX3",
                            "ASPRX1",               "VPMON ADC",
                            "ASPRX1",               "VBSTMON ADC",
                            "AMP Playback",         "ASPRX1",
                            "Main AMP",             "SPK",
                            "CLASS H",              "PCM Source"; */

                    simple-audio-card,format = "i2s";
                    simple-audio-card,bitclock-master = <&sound0_master>;
                    simple-audio-card,frame-master = <&sound0_master>;
                    /*simple-audio-card,bitclock-inversion; */
                  simple-audio-card,mclk-fs = <256>;

                      sound0_master: simple-audio-card,cpu {
                            sound-dai = <&mcasp2>;
                            system-clock-frequency = <12288000>;
                    };

                   simple-audio-card,codec {
                            sound-dai = <&cs35l41_l>;
                          /*  clocks = <&atl_clkin0_ck>; */
                    };

            };


    But,still no sound and its playing fast and while playing its shows "davinci-mcasp 48464000.mcasp: Too fast reference clock (12288000)  and dra7-atl 4843c000.atl: atl1 has not been configured "

    "I'd suggest that you try sourcing AHCLK from MCASP2_AHCLKX."

    But in my codec doesn't have option to connect  MCASP2_AHCLKX,only option is clock generate from MCASP2_ACLKX or MCASP2_ACLKR.

    Please help me to solve this issue.

    Thanks & Regards,

    Sankar.

  • Sankar,

    "atl1 has not been configured" is due to missing atl1 configuration (rename "atl2" -> "atl1"):

    atl1 {
        bws = <DRA7_ATL_WS_MCASP2_FSX>;
        aws = <DRA7_ATL_WS_MCASP2_FSX>;
    };

    "Too fast reference clock (12288000)" happens when McASP driver wasn't able to find a clock divider suitable for the sysclk_freq = 12.288MHz and the BCLK freq. Here the assumption is that you're requesting a BCLK of 3.072MHz, which would require a McASP clock divider of 4. This should be fine.

    I believe the BCLK you're requesting isn't 3.072MHz. This BCLK is determined by the audio parameters you're passing (i.e. channel count, sampling rate, sample size). Could you please share those parameters and the instruction(s) you're using to play/record audio?

    Re "But in my codec doesn't have option to connect  MCASP2_AHCLKX" - this would be internal to TDA2.

  • Hi,

    Here audio parameter information.

    aplay /home/sourceCode/WAV/PCM\ 24\ bit/pcm\ stereo\ 24\ bit\ 48kHz.wav -vvv

    Plug PCM: Linear conversion PCM (S16_LE)
    Its setup is:
      stream       : PLAYBACK
      access       : RW_INTERLEAVED
      format       : S24_3LE
      subformat    : STD
      channels     : 2
      rate         : 48000
      exact rate   : 48000 (48000/1)
      msbits       : 24
      buffer_size  : 24000
      period_size  : 6000
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 6000
      period_event : 0
      start_threshold  : 24000
      stop_threshold   : 24000
      silence_threshold: 0
      silence_size : 0
      boundary     : 1572864000

    Passing "simple-audio-card,mclk-fs = <256>;" from devicetree,song playing fast(sound not coming but I am checking logs by giving -vvv) and

    I probed BCLK using oscilloscope BLCK is 121 MHz

    With out Passing "simple-audio-card,mclk-fs = <256>;" from devicetree,song playing normal(sound not coming but I am checking logs by giving -vvv) and I probed BCLK using oscilloscope  BLCK is 30.1 MHz

    But I need BCLK is 3.072 MHz,please help me where I am setting wrong clock. 

    Note : while playing 48KHz audio I am not getting Too fast reference clock (12288000),if I play 8KHz audio I am getting Too fast reference clock issue

    Thanks,

    Sankar.

     

     

  • Hi,

    I probed FCLK,its coming proper 48KHz

    But BCLK is 30.1MHz,its multiplying 10KHz with required BCLK(3.072MHz),can you please help me where we are wrong?

    My project time lines are very near to the dead line.

    Thanks & Regards,

    Sankar

  • Hi,

    I probed FCLK,its coming proper 48KHz

    Sorry,I probed wrong pin,now i probed MCASP2_AHCLKX pin its giving BCLK is 1.53MHz

    But I need BCLK is 3.072MHz,can you please help how to get 3.072MHz clock?

    My project time lines are very near to the dead line.

    Thanks & Regards,

    Sankar

  • I think you get BCLK=1.53MHz because natively McASP is playing at 16-bits/sample. That is, 48000 Hz x 2-channels x 16-bits/sample = 1.536MHz.

    From an earlier post you said:

    aplay /home/sourceCode/WAV/PCM\ 24\ bit/pcm\ stereo\ 24\ bit\ 48kHz.wav -vvv
    
    Plug PCM: Linear conversion PCM (S16_LE)
    ...

    Please try: aplay -Dhw:0,0 sample.wav. Replace 0,0 with your card and PCM device numbers if needed. Using 'hw' makes sure that no SRC in ALSA takes place. Otherwise, an ALSA plugin would be doing the conversion from the 24-bit of you sample to 16-bit, and McASP would render at 16-bit/sample.

  • Hi,

    Thanks for your speed reply.

    Passing Dh:w0,0 I am getting below error.

    alpay- Dh:w0,0 /home/Lsat_Energy_For_The_Day.wav
    Paying WAVE '/home/Last_Energy_For_The_Day.wav' : Foat 32 bit Lttle Endian, Rate 44100 Hz, Mono
    aplay: set_params:1299: Sample format non available
    Available formats:
    - S16_LE

    But S24_LE also shows BCLK is 1.53 MHz

    As per above formula 44100Hz x 2-channels x 24-bits/sample = 2.11 MHz

    I am not understand this,please help me.

    aplay  /home/Last_Energy_For_The_Day.wav -vvv
    Playing WAVE '/home/Last_Energy_For_The_Day.wav' : Float 32 bit Little Endian, Rate 44100 Hz,

    Plug PCM: Linear Integer <-> Linear Float conversion PCM (S24_LE)
    Its setup is:
      stream       : PLAYBACK
      access       : RW_INTERLEAVED
      format       : FLOAT_LE
      subformat    : STD
      channels     : 1
      rate         : 44100
      exact rate   : 44100 (44100/1)
      msbits       : 32
      buffer_size  : 22050
      period_size  : 5512
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 5512
      period_event : 0
      start_threshold  : 22050
      stop_threshold   : 22050
      silence_threshold: 0
      silence_size : 0
      boundary     : 1445068800
    Slave: Rate conversion PCM (32000, sformat=S24_LE)
    Converter: linear-interpolation
    Protocol version: 10002
    Its setup is:
      stream       : PLAYBACK
      access       : MMAP_INTERLEAVED
      format       : S24_LE
      subformat    : STD
      channels     : 1
      rate         : 44100
      exact rate   : 44100 (44100/1)
      msbits       : 32
      buffer_size  : 22050
      period_size  : 5512
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 5512
      period_event : 0
      start_threshold  : 22050
      stop_threshold   : 22050
      silence_threshold: 0
      silence_size : 0
      boundary     : 1445068800
    Slave: Route conversion PCM (sformat=S24_LE)
      Transformation table:
        0 <- 0
        1 <- 0
    Its setup is:
      stream       : PLAYBACK
      access       : MMAP_INTERLEAVED
      format       : S24_LE
      subformat    : STD
      channels     : 1
      rate         : 32000
      exact rate   : 32000 (32000/1)
      msbits       : 32
      buffer_size  : 16000
      period_size  : 4000
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 4000
      period_event : 0
      start_threshold  : 16000
      stop_threshold   : 16000
      silence_threshold: 0
      silence_size : 0
      boundary     : 2097152000

    Thanks & Regards,

    Sankar.

  • Hi,

    I cross checked with same wav file with TDA2XX-EVM and my custom board.

    Result is here,

    TDA2XX-EVM board output:

    root@dra7xx-evm:/opt/vision_sdk# aplay -vvv /home/WAV/PCM\ 24\ bit/pcm\ stereo\ 24\ bit\ 48kHz.wav                                                                       
    Playing WAVE '/home/WAV/PCM 24 bit/pcm stereo 24 bit 48kHz.wav' : Signed 24 bit Little Endian in 3bytes, Rate 48000 Hz, Stereo
    Plug PCM: Rate conversion PCM (44100, sformat=S32_LE)
    Converter: linear-interpolation
    Protocol version: 10002
    Its setup is:
      stream       : PLAYBACK
      access       : RW_INTERLEAVED
      format       : S24_3LE
      subformat    : STD
      channels     : 2
      rate         : 48000
      exact rate   : 48000 (48000/1)
      msbits       : 24
      buffer_size  : 17832
      period_size  : 4458
      period_time  : 92879
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 4458
      period_event : 0
      start_threshold  : 17832
      stop_threshold   : 17832
      silence_threshold: 0
      silence_size : 0
      boundary     : 1168637952
    Slave: Hardware PCM card 0 'DRA7xx-EVM' device 0 subdevice 0
    Its setup is:
      stream       : PLAYBACK
      access       : MMAP_INTERLEAVED
      format       : S32_LE
      subformat    : STD
      channels     : 2
      rate         : 44100
      exact rate   : 44100 (44100/1)
      msbits       : 32
      buffer_size  : 16384
      period_size  : 4096
      period_time  : 92879
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 4096
      period_event : 0
      start_threshold  : 16384
      stop_threshold   : 16384
      silence_threshold: 0
      silence_size : 0
      boundary     : 1073741824
      appl_ptr     : 0
      hw_ptr       : 0

    My custom board Output:

    aplay -f S32_LE /home/sourceCode/WAV/PCM\ 24\ bit/pcm\ stereo\ 24\ bit\ 48kHz.wav -vvv
    Warning: format is changed to S24_3LE
    Playing WAVE '/home/sourceCode/WAV/PCM 24 bit/pcm stereo 24 bit 48kHz.wav'
    Signed 24 bit Little Endian in 3bytes, Rate 48000 Hz, Stereo
    Plug PCM: Linear conversion PCM (S16_LE)
    Its setup is:
      stream       : PLAYBACK
      access       : RW_INTERLEAVED
      format       : S24_3LE
      subformat    : STD
      channels     : 2
      rate         : 48000
      exact rate   : 48000 (48000/1)
      msbits       : 24
      buffer_size  : 24000
      period_size  : 6000
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 6000
      period_event : 0
      start_threshold  : 24000
      stop_threshold   : 24000
      silence_threshold: 0
      silence_size : 0
      boundary     : 1572864000
    Slave: Hardware PCM card 0 'CS48L32' device 0 subdevice 0
    Its setup is:
      stream       : PLAYBACK
      access       : MMAP_INTERLEAVED
      format       : S16_LE
      subformat    : STD
      channels     : 2
      rate         : 48000
      exact rate   : 48000 (48000/1)
      msbits       : 16
      buffer_size  : 24000
      period_size  : 6000
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 6000
      period_event : 0
      start_threshold  : 24000
      stop_threshold   : 24000
      silence_threshold: 0
      silence_size : 0
      boundary     : 1572864000
      appl_ptr     : 0
      hw_ptr       : 0

    In TDA2XX-EVM BCLK is 2.82MHz and FCLK is 44.1 KHz

    but,My custom board BCLK is 1.53MHz and FCLK is 48KHz

    Can you please tell me,why BLCK and FCLK vary for TDA2XX and my Custom board,but .wav file is same.

    Thanks & Regards,

    Sankar.

     

  • Sankar,

    Please notice that ALSA's converter is producing outputs with different parameters in both cases:

    • TDA2XX EVM: wav file = 24-bits/sample, 48kHz, stereo -> ALSA plugin  -> 32-bits/sample, 44.1kHz, stereo
      • BCLK = 32 x 44100 x 2 = 2.8224MHz
    • Custom board: wav file = 24-bits/sample -> ALSA plugin -> 16-bits/sample, 48kHz, stereo
      • BCLK = 16 x 48000 x 2 = 1.536MHz

    The parameters that the kernel will receive are shown in aplay command output:

    Slave: Hardware PCM card 0 'CS48L32' device 0 subdevice 0
    Its setup is:
      stream       : PLAYBACK
      access       : MMAP_INTERLEAVED
      format       : S16_LE
      subformat    : STD
      channels     : 2
      rate         : 48000

    Regarding 24-bits support in your setup. Below logs seem to indicate that your CSL48L32 codec/driver may only support 16-bits.

    alpay- Dh:w0,0 /home/Lsat_Energy_For_The_Day.wav
    Paying WAVE '/home/Last_Energy_For_The_Day.wav' : Foat 32 bit Lttle Endian, Rate 44100 Hz, Mono
    aplay: set_params:1299: Sample format non available
    Available formats:
    - S16_LE

    Keep in mind that when you are passing -Dhw:0,0, you won't be getting any conversion in userspace, so the parameters of your sample file will be passed to the kernel. In above case, you should have passed a sample file that has 32-bits/sample, 44.1kHz, mono audio. It should have been a sample file with the parameters your hardware natively supports.

  • Hi,

    Thanks for speed reply.

    I am new in audio subsystem.

    Can you please give clarifications of below things.

    I am playing same song in TDA2XX EVM and my Custom board.but sample rate and formats are not same.

    Please confirm,who is changing the ALSA piug in its CS48L32 driver or MCASP driver ?

    "Regarding 24-bits support in your setup. Below logs seem to indicate that your CSL48L32 codec/driver may only support 16-bits"

    No,CS48L32 will support 32 bit also.

    Thanks & Regards,

    Sankar.

  • Sankar,

    ALSA plugin is userspace component. Please take a look here:

    So, any kind of conversion needed (i.e. sampling rate, channel count, rate) is done in userspace and then the converted stream is passed to the kernel.

    Pay attention to the output of aplay -v, it shows a two sets of parameters, the top one corresponds to the wav file parameters, the bottom one (slave PCM) is the output of conversion and wha'ts being fed into kernel.

  • Sankar,

    Are there any further questions on this topic? Please make sure that you can pass the intended audio parameters to the kernel, also make sure that your audio driver supports it.

    For a quick test to make sure that your driver supports the intended audio parameters, you can try something like:

    aplay -Dhw:0,0 -c 2 -r 48000 -fS32_LE /dev/urandom
    aplay -Dhw:0,0 -c 2 -r 48000 -fS32_LE /dev/zero

    Replace sampling rate, channel count and format as needed for the test. If any of the involved drivers (McASP, CS48L32) doesn't support the parameters requested by aplay, it will return an error.

  • Hi,

    Thanks for your inputs.

    My audio speaker is working file.

    Now,I am working on MIC part.

    In MIC codec,I am configuring CS35L41 codec as Master.

    Please tell me,if I configured codec as a Master,from tda2xx side what I have to send from devicetree for generating the clock.

    Thanks & Regards,

    Sankar.

  • Sankar,

    Please make the CS35L41 the "sound0_master" in the sound card node. Also make sure that the McASP AHCLK and AFSX pins are configured as inputs.

  • Hi,

    Thanks for quick reply.

    I am configured device tree like below for  cs35l41 as master.

            sound0: sound0 {
                    compatible = "simple-audio-card";
                    status = "okay";
                    simple-audio-card,name = "CS35L41";
                    simple-audio-card,widgets =
                            "Headphone", "Headphone Jack",
                            "Line", "Line Out",
                            "Microphone", "Mic Jack",
                            "Line", "Line In";
    /*
                    simple-audio-card,routing =
                            "ASP TX1 Source",       "ASPTX1",
                            "ASP TX3 Source",       "ASPTX3",
                            "ASPRX1",               "VPMON ADC",
                            "ASPRX1",               "VBSTMON ADC",
                            "AMP Playback",         "ASPRX1",
                            "Main AMP",             "SPK",
                            "CLASS H",              "PCM Source"; */

                    simple-audio-card,format = "i2s";
                    simple-audio-card,bitclock-master = <&sound0_master>;
                    simple-audio-card,frame-master = <&sound0_master>;


                   simple-audio-card,cpu {
                           sound-dai = <&mcasp3>;
                            system-clock-frequency = <12288000>;
                    };

                   sound0_master: simple-audio-card,codec {
                            sound-dai = <&cs48l32>;
                    };

            };

    I commented ATL in device tree.

    /*
    &atl {
            assigned-clocks = <&abe_dpll_sys_clk_mux>,
                              <&atl_gfclk_mux>,
                              <&dpll_abe_ck>,
                              <&dpll_abe_m2x2_ck>,
                              <&atl_clkin1_ck>;
            assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
            assigned-clock-rates = <0>, <0>, <122880000>, <245760000>,
                                    <12288000>;

            status = "okay";

            atl1 {
                    bws = <DRA7_ATL_WS_MCASP2_FSX>;
                    aws = <DRA7_ATL_WS_MCASP3_FSX>;
            };
    };
    */
    &mcasp3 {
            #sound-dai-cells = <0>;
     /*       assigned-clocks = <&mcasp2_ahclkx_mux>;
            assigned-clock-parents = <&atl_clkin1_ck>; */

            status = "okay";

            op-mode = <0>;
            tdm-slots = <2>;

            serial-dir = <   
                    1 2 0 0
            >;
            tx-num-evt = <32>;
            rx-num-evt = <32>;
    };

    While recording  I am not seen any output in my console,out put like below.


    root@dra7xx-evm:~# arecord -vvv test.wav                                                                                                       
    [   49.720539] tacna spi1.0: VDD_D didn't power off when expected
    Recording WAVE 'test.wav' : Unsigned 8 bit, Rate 8000 Hz, Mono
    [   49.728754]
    [   49.728754]
    [   49.728754]  asoc_simple_card_hw_params
    [   49.728754]
    Plug PCM: Route conversion PCM (sformat=S16_LE)
      Transformation table:
        0 <- 0*0.5 + 1*0.5
    Its setup is:
      stream       : CAPTURE
      access       : RW_INTERLEAVED
      format       : U8
      subformat    : STD
      channels     : 1
      rate         : 8000
      exact rate   : 8000 (8000/1)
      msbits       : 8
      buffer_size  : 4000
      period_size  : 1000
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 1000
      period_event : 0
      start_threshold  : 1                                
      stop_threshold   : 4000                             
      silence_size : 0                                                
      boundary     : 2097152000  

    Slave: Hardware PCM card 0 'CS35L41' device 0 subdevice 0
    Its setup is:
      stream       : CAPTURE
      access       : MMAP_INTERLEAVED
      format       : S16_LE
      subformat    : STD
      channels     : 2
      rate         : 8000
      exact rate   : 8000 (8000/1)
      msbits       : 16
      buffer_size  : 4000
      period_size  : 1000
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 1000
      period_event : 0
      start_threshold  : 1
      stop_threshold   : 4000
      silence_threshold: 0
      silence_size : 0
      boundary     : 2097152000
      appl_ptr     : 0
      hw_ptr       : 0

    I given -vvv,but there is no recording,its stopped there.

    Can you please confirm,my device tree configuration is correct ?

    Thanks & Regards,

    Sankar.

  • Hi,

      sound0_master: simple-audio-card,codec {
                            sound-dai = <&cs48l32>;
                    };

    sorry, I have changed to cs35l41 but output is same,there is no recording.

      sound0_master: simple-audio-card,codec {
                            sound-dai = <&cs35l41>;
                    };

    For MCLK I am using external 12 MHz oscillator.

    Thanks & Regards,

    Sankar.

  • Sankar,

    Re "there is no recording" - are you getting I/O error from recording app or recorded data is silence? Please check that hw_ptr, appl_ptr are moving in ALSA's procfs entry as described in page 3 in this app  note.

    One gets an I/O error when there is no data flow which can happen if the master device isn't generating required clocks as no new samples would be shifted in by McASP.

    If you get silence, check that your codec is correctly configured (i.e. gains, switches, recording paths, etc). Also double check your pin mux settings.

  • Hi,

    Please find the pin mux.

            {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},      /* mcasp3_aclkx.mcasp3_aclkx */
            {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},    /* mcasp3_fsx.mcasp3_fsx */
            {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},   /* mcasp3_axr0.mcasp3_axr0 */
            {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},   /* mcasp3_axr1.mcasp3_axr1 */

    root@dra7xx-evm:~# arecord -vvv test.wav &
    [1] 4013
    [ 3797.880816] tacna spi1.0: VDD_D didn't power off when expected
    Recording WAVE 'test.wav' : Unsigned 8 bit, Rate 8000 Hz, Mono
    [ 3797.888985]
    [ 3797.888985]
    [ 3797.888985]  asoc_simple_card_hw_params
    [ 3797.888985]
    Plug PCM: Route conversion PCM (sformat=S16_LE)
      Transformation table:
        0 <- 0*0.5 + 1*0.5
    Its setup is:
      stream       : CAPTURE
      access       : RW_INTERLEAVED
      format       : U8
      subformat    : STD
      channels     : 1
      rate         : 8000
      exact rate   : 8000 (8000/1)
      msbits       : 8
      buffer_size  : 4000
      period_size  : 1000
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 1000
      period_event : 0                                                                     
      start_threshold  : 1                                                                 
      stop_threshold   : 4000                                                              
      silence_threshold: 0                                                                 
      silence_size : 0                                                                     
      boundary     : 2097152000
    Slave: Hardware PCM card 0 'CS35L41' device 0 subdevice 0
    Its setup is:
      stream       : CAPTURE
      access       : MMAP_INTERLEAVED
      format       : S16_LE
      subformat    : STD
      channels     : 2
      rate         : 8000
      exact rate   : 8000 (8000/1)
      msbits       : 16
      buffer_size  : 4000
      period_size  : 1000
      period_time  : 125000
      tstamp_mode  : NONE
      tstamp_type  : MONOTONIC
      period_step  : 1
      avail_min    : 1000
      period_event : 0
      start_threshold  : 1
      stop_threshold   : 4000
      silence_threshold: 0
      silence_size : 0
      boundary     : 2097152000
      appl_ptr     : 0
      hw_ptr       : 0


    root@dra7xx-evm:~# cat /proc/asound/card0/pcm0p/sub0/status
    closed

    I am not able to read appl_ptr  and   hw_ptr values,because status is closed. 

    Can you please confirm,device tree changes is okay for CS35L41 ?

    Thanks & Regards,

    Sankar.

  • AFAICT, yes, the devicetree changes look good. I'm not familiar with CSL35L41 so won't be able to comment on the specifics of it.

    It doesn't make sense that you can't read "status" procfs entry. It must be read while arecord is in progress. Make sure that an error isn't returned by the sound card which may cause arecord to stop abruptly. Even if you hadn't clocks, it would take 10 secs to timeout and return an I/O error.

  • Sankar,

    Any luck with the audio record path? Were you able to resolve this issue?

  • Hi,

    Yes,MIC is working fine.

    Now I need to add (Speaker and MIC) both in same device tree.

    I adding both the codec's  like below.

    sound0: sound0 {
                    compatible = "simple-audio-card";
                    status = "okay";
                    simple-audio-card,name = "CS35L41";
                    simple-audio-card,widgets =
                            "Headphone", "Headphone Jack",
                            "Line", "Line Out",
                            "Microphone", "Mic Jack",
                            "Line", "Line In"


                    simple-audio-card,dai-link@0 {
                  format = "i2s";
                    bitclock-master = <&sound0_0_master>;
                    frame-master = <&sound0_0_master>;
                   cpu {
                           sound-dai = <&mcasp3 0>;
                            system-clock-frequency = <12288000>;
                    };

                   sound0_0_master: codec {
                            sound-dai = <&cs48l32 0>;
                    };
    };
                    simple-audio-card,dai-link@1 {
                  format = "i2s";
                    bitclock-master = <&sound0_1_master>;
                    frame-master = <&sound0_1_master>;

                   sound0_1_master: cpu {
                            sound-dai = <&mcasp2 1>;
                            system-clock-frequency = <12288000>;
                    };

                   codec {
                            sound-dai = <&cs35l41_l 1>;
                            system-clock-frequency = <1536000>;
                      
                    };
            };

    };

    But,there is no sound cards are registered.

    aplay -l
    aplay: device_list:268: no soundcards found...

    Could you please help me,how to add two codecs in device tree.

    Thanks & Regards,

    Sankar.

  • Sankar,

    Try changing "sound-dai = <&mcasp3 0>;" to "sound-dai = <&mcasp3>;", "sound-dai = <&cs48l32 0>;" to "sound-dai = <&cs48l32>;". Likewise for McASP and codec in the second port.

  • Hi,

    I tried but result is same

  • Hi,

    Could you please help me solve this issue.

    Thanks & Regards,

    Sankar.

  • Sankar, please provide the relevant dts files and boot logs. Also make sure that the simple card in your kernel version does support multiple DAI links.

  • Sankar, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out).

  • Hi,

    Thanks for your suppot,please close this issue

    Thanks & Regards,

    Sankar.