Part Number: AM5728
Other Parts Discussed in Thread: DRA742
Hello Champs,
Hardware: combine 2x 16bit DDR3 to 32bit DDR
Software: Processor SDK 04.03.00.05
Customer reallocated CMA memory by modifying device tree and the related header file on dsp side. But some address can work, some address can't work, is there some limitation for the address range?
When loading 2 dsp core at the first time, it can work, but when reloading the dsp code by using load-firmware.sh, it can't work at some address. The unwork DDR address can be read/written successfully with the memtester code.
Below is the DTS:
/ {
compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
aliases {
rtc0 = &mcp_rtc;
rtc1 = &tps659038_rtc;
rtc2 = &rtc;
display0 = &hdmi0;
sound0 = &hdmi;
sound1 = &sound0;
};
chosen {
stdout-path = &uart3;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ipu2_cma_pool: ipu2_cma@b8000000 {
compatible = "shared-dma-pool";
reg = <0x0 0xb8000000 0x0 0x2000000>;
reusable;
status = "okay";
};
dsp1_cma_pool: dsp1_cma@b0000000 {
compatible = "shared-dma-pool";
reg = <0x0 0xb0000000 0x0 0x4000000>;
reusable;
status = "okay";
};
ipu1_cma_pool: ipu1_cma@ba000000 {
compatible = "shared-dma-pool";
reg = <0x0 0xba000000 0x0 0x2000000>;
reusable;
status = "okay";
};
dsp2_cma_pool: dsp2_cma@b4000000 {
compatible = "shared-dma-pool";
reg = <0x0 0xb4000000 0x0 0x4000000>;
reusable;
status = "okay";
};
dsp2dsp_shm: dsp2dsp_shm@bf000000 {
reg = <0x0 0xbf000000 0x0 0x1000000>;
no-map;
status = "okay";
};
};
Below is the memory map configuration on dsp side
#define CMA_DSP_PHYS_ADDR 0xb0000000
#define CMA_DSP_SIZE (SZ_1M * 56)
#define SR0_PHYS_ADDR 0xbf000000
#define SR0_SIZE (SZ_1M)
#define CMEM_PHYS_ADDR 0xbc000000
#define CMEM_SIZE (SZ_1M * 10)
//dsp cmd
#define DSP_MEM_TEXT 0xa0000000
#define DSP_MEM_DATA 0xa0200000
#define DSP_MEM_HEAP 0xa0400000
#define DSP_MEM_IPC_DATA 0xa0f00000
#define DSP_MEM_TEXT_SIZE (SZ_1M * 2)
#define DSP_MEM_DATA_SIZE (SZ_1M * 2)
#define DSP_MEM_HEAP_SIZE (SZ_1M * 3)
#define DSP_MEM_IPC_DATA_SIZE SZ_1M
//cmem
#define PHYS_MEM_IOBUFS CMEM_PHYS_ADDR
#define DSP_MEM_IOBUFS 0x80000000
#define DSP_MEM_IOBUFS_SIZE CMEM_SIZE
//SR0
#define PHYS_SR0 SR0_PHYS_ADDR
#define DSP_SR0 SR0_PHYS_ADDR
#define DSP_SR0_SIZE SR0_SIZE
/*
* Assign fixed RAM addresses to facilitate a fixed MMU table.
*/
/* Once you’ve created your custom resource table,
* you must update the address of PHYS_MEM_IPC_VRING
* to be the same base address as your corresponding CMA. */
#define PHYS_MEM_IPC_VRING CMA_DSP_PHYS_ADDR
#define DSP_MEM_IPC_VRING 0xc0000000
#define DSP_MEM_RPMSG_VRING0 0xc0000000
#define DSP_MEM_RPMSG_VRING1 0xc0004000
#define DSP_MEM_VRING_BUFS0 0xc0040000
#define DSP_MEM_VRING_BUFS1 0xc0080000
#define DSP_MEM_IPC_VRING_SIZE SZ_1M
/*
* Sizes of the virtqueues (expressed in number of buffers supported,
* and must be power of 2)
*/
#define DSP_RPMSG_VQ0_SIZE 256
#define DSP_RPMSG_VQ1_SIZE 256
/* flip up bits whose indices represent features we support */
#define RPMSG_DSP_C0_FEATURES 1
The DSP CMA address:
DSP1：0xb0000000~0xb3ffffff
DSP2：0xb4000000~0xb7ffffff
Reloading the dsp code,run the command: echo 40800000.dsp > /sys/bus/platform/drivers/omap-rproc/unbind, the system ran with below errors.
[ 457.348466] Unable to handle kernel paging request at virtual address f226608c
[ 457.355723] pgd = cf8d7b80
[ 457.358442] [f226608c] *pgd=80000080007003, *pmd=ac1f7003, *pte=00000000
[ 457.365200] Internal error: Oops: a07 [#1] PREEMPT SMP ARM
[ 457.365206] Modules linked in: cmemk(O)
[ 457.365213] CPU: 0 PID: 249 Comm: load-firmware.s Tainted: G O 4.9.65-rt23 #3
However, when modifying the DSP CMA address as follows.
DSP1：0xa0000000~0xa3ffffff
DSP2：0xa4000000~0xa7ffffff
It can work successfully.
Thanks.
Rgds
Shine
