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AM4379: DDR-less EtherCAT

Part Number: AM4379
Other Parts Discussed in Thread: SYSBIOS, AMIC110,

Hi,

We are working on AM437x-IDK (SD Card boot).

We don't use QSPI Flash because our custom board is designed without QSPI Flash.

PDK Version : pdk_am437x_1_0_15

Sysbios Version : bios_6_75_02_00

We build the Eathercat application from PRU-ICSS-EtherCAT_Slave_01.00.07.02 SDK. I successfully compiled and run the application in AM437x-IDK on DDR.

But our end application is board should work in on-chip RAM, so we followed this document SPRAC45A and build application for on-chip RAM(L3 Build).

But the application is not running on board we made the following changes for memory segments.

For testing, we changed the memory segment like below and the application is booting fine.

Since we need OCMCRAM because our application size gets increases after integrating all features.

Kindly help us to resolve this issue.

Regards,

Ravi

 

  • Hi Ravi,

    >>But the application is not running on board we made the following changes for memory segments.

    SPRAC45A was based on earlier Sysbios Industrial SDK 2.1.1.2, with the PRU-ICSS-EtherCAT_Slave_01.00.07.02 SDK, how does your ecat_appl.xdt look like?

    You may try to follow UG section-1.1.9. On-chip Memory (DDRless) Execution of EtherCAT Slave Application:

    AMIC12x essentially is a variant of AM437x.

    Regards,
    Garrett

  • Hello Garrett,

    Thanks for your replay.

    I search the entire "ti" folder, I can't find ecat_appl.xdt file.

    SDK Version: PRU-ICSS-EtherCAT_Slave_01.00.07.02

    And I go through the link you shared section 1.19.2.4 is mentioned about PRU binary location in SPI Flash memory in our design, we don't have Flash memory we have only SD interface.

    For SD Card boot what should we follow to load this PRU binary?

    Regards,

    Ravi

  • Ravi,

    There is no ecat_appl.xdt in PRU-ICSS-EtherCAT_Slave_01.00.07.02. That's why I was curious how you create the file and follow SPRAC45A to build DDR-less EtherCAT on AM437x.

    section 1.1.9.2.x is not applicable to your use case as it discusses AMIC110 which is a variant of AM335x.

    Regards,

    Garrett

  • Hello Garrett,

    Thanks for the support.

    I complied and generated a binary for L3 build by two-Method,(because Method 1 is not working and Method 2 is working for me)

    Method 1: Code Memory - L2SRAM

    Data Memory - OCMCRAM

    Stack Memory - OCMCRAM

    Generated binary -app_L2_OCMC.zip

    Method 2: Code Memory - L2SRAM

    Data Memory - L2SRAM

    Stack Memory - L2SRAM

    Generated binary -app_L2.zip

    You can see the difference in the binary size, Method 1 is bigger then Method 2, since I build binary for the same project.

    Due to size increase in Method 1 application is not running, I open two binary in hex-editor then I find out lot's of 0x00 added in Method 1 Binay.

    Kindly help us to resolve this issue.

    Regards,

    Ravi

  • Hi Guys,

    At this point, I can't able to go further.

    So, I am waiting for your replay.

    Regards,

    Ravi

  • Ravi,

    As there is no ecat_appl.xdt file for AM437x , did you follow the procedure as described in the section 1.1.9.1. On-chip Memory (DDRless) Execution on AMIC12x ICE to build the DDR less binary and modify the SBL? 

    Regards,

    Garrett

  • Garrett,

    I followed as described in section 1.1.9.1 exactly. And I also made changes in SBL too.

    As I told before, if I build only for L2 application binary size is normal, but if I build for L2+OCMCRAM application size gets increases.

    Why application binary size gets increased for L2+OCMCRAM build?

    Regards,

    Ravi

  • Ravi,

    readelf will provide detailed info of each section of .out files for the build of L2 SRAM and L2 SRAM + OCMCRAM:

    C:/ti/ccs901/ccs/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major-win32/bin/arm-none-eabi-readelf.exe -e ethercat_slave_demo_AMIC12x_arm.out

    I could see the same size in my build as your app file for the default setting L2 SRAM + OCMCRAM.

    Regards,

    Garrett

  • Garrett,

    Build an application in L2 RAM setting application size - 129K

    Build application in L2 + OCMC  RAM setting application size -  2.2M

        Note: No chmaged made in application source, only changes in RTSC Tool settings.

    Since AM4379 On-Chip OCMC-RAM 256KB and L2 Cache 256KB, so L2 + OCMC  RAM-based build application won't fit in on-chip RAM.

    Questions:

    1. Why application size get increase since nothing changed in the source?

    2. Will this  L2 + OCMC  RAM setting will work for AM4379 On-chip RAM application, if yes what should I do for that?

    Regards,

    Ravi

  • Ravi,

    The size of application binary/app file should be ~180KB only while the .out file size is 2MB. I was looking to .out file while comparing with your app file.

    I have attached the demo .out and app file built with default L2 + OCMC_RAM for your reference. You can verify with .out file and GEL file updated as described in 1.1.9.1.2. Modifying Gel files for AMIC12x on-chip Memory Execution:

    GEL_TextOut("Enabling L2 as SRAM...  \n");
    *((unsigned int*) 0x44E10654)      =  4;
    *((unsigned int*) 0x44E101E0)      =  0x10000;
    GEL_TextOut("Enabled L2 as SRAM...  \n");

    Or test app file with SBL change as in section 1.1.9.1.1. Modifying SBL for AMIC12x on-chip Memory Execution.

    These can be tested on AM437x IDK.

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/ethercat_5F00_slave_5F00_demo_5F00_AMIC12x_5F00_arm.out

    
    

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/1643.app



    Regards,
    Garrett

  • Hi Garrett,

    I do the changes in AM437x_EVM. gel file,  then run AM43xx_IDK_EVM_Initialization and load application via JTAG.

    But the application not running on AM437x-IDK.

    I found some changes in program headers and I am not familiar with program headers. So I attached .out and binary file for your reference 

    Kindly look into that and let me know the issues.

    I converted .out to .bin manually for testing using the following command but still, the applicatin.bin size is about 2M.

    "ti/gcc-arm-none-eabi-7-2018-q2-update/bin/arm-none-eabi-objcopy -O binary application.out application.bin"

    Once again I share my RTSC tool settings for your reference

    Kindly help us to resolve this issue as soon as possible.

    Regards,

    Ravi

  • Ravi,

    Somehow I always got error while downloading your files:

    "Unfortunately, the page you've requested no longer exists. Please use the search form above to locate the information you're interested in."

    .bin or app file is converted from .out with a post-build script in CCS project property - >CCS Build ->Steps:

    ${CG_TOOL_ROOT}/bin/arm-none-eabi-objcopy -O binary ${ProjName}.out ${ProjName}.bin && ${PDK_INSTALL_PATH}/ti/starterware/tools/ti_image/tiimage.exe 0x40500000 NONE ${ProjName}.bin app

    The RTSC tool settings you uploaded seems to be lost too, but essentially you should not need any manual configuration to build the default L2+OCMC_RAM binary.

    >>I found some changes in program headers and I am not familiar with program headers

    Can you please be more specific on the changes?

    Regards,

    Garrett

  • HI Garrett,

    Thanks for your support.

    Binary which you attached is not working in AM4379-IDK.

    Once again I attached all file in compressed format.

    ddr-less.zip

    Regards,

    Ravi

  • Ravi,

    >>Binary which you attached is not working in AM4379-IDK.

    Does the application crash or the ESC device is not detected by master?

    If it's the latter, did you add the TiEtherCATLib.xml in your master side? And how does the wireshark packet capture look like?

    Regards,

    Garrett

  • Garrett,

    Application get crashed, I checked through JTAG.

    Did you checked .out and .bin file is it look good?

    Regards,

    Ravi

  • Ravi,

    You might need look into your board_init function and pinmux to see if it matches your custom board.

    I tried your .out file in ddr-less.zip on my AM472x IDK and it works fine as well - in OP state and detected by TwinCAT.

    Regards,
    Garrett

  • Garrett,

    I am testing with AM4379-IDK not custom board.

    How you tried .out in chip I hope we can't run .out in chip we need to convert .out into .bin file.

    since .bin size is 2MB,It won't fit in on-chip internal RAM.

    Regards,

    Ravi

  • Ravi,

    I didn't test your .bin file as the size is much larger than the auto generated by the post build script.

    The .bin or app file should be generated as the post-build script in CCS project property - >CCS Build ->Steps:

    ${CG_TOOL_ROOT}/bin/arm-none-eabi-objcopy -O binary ${ProjName}.out ${ProjName}.bin && ${PDK_INSTALL_PATH}/ti/starterware/tools/ti_image/tiimage.exe 0x40500000 NONE ${ProjName}.bin app

    Were you able to run .out file on your IDK board first?

    Regards,

    Garrett

  • Garrett,

    I can run .out file in IDK board through JTAG, .out working fine in IDK board.

    But still, .bin not working and its size is 2.2M.

    And .bin generated by post-build script only. Why .bin size increased? How to overcome this issue?

    Regards,

    Ravi

  • Ravi,

    Was your .out created based on amic12x_onchip_mem_app.xdt and amic12x_onchip_mem_app.cfg?

    Regards,
    Garrett

  • Garrett,

    Thanks for pointing it out,I copy and rename .xdt file its working for me.

    But this not mentioned  in any document.

    Now application running, but I found this snippet 

    #ifndef AMIC11X_ONCHIP_MEM_MODE
        /* map the array which contains pru firmware instrcutions.
           If the application is built to execute from internal RAM completely,then
           pru instructions are expcted to be stored in SPI flash and this mapping is
           not required*/
    
        bsp_set_pru_firmware((uint32_t *)FrameProc, sizeof(FrameProc),
                             (uint32_t *)HostProc, sizeof(HostProc));
    
    
    #endif

    We don't have any SPI Flash in our design, we only have SD Card interface.

    How can I run ethercat_slave_application without SPI Flash?

    Regards,

    Ravi

  • Ravi,

    The EtherCAT software must use SPI flash for Ethercat slave configuration EEPROM, see discussion in the thread - https://e2e.ti.com/support/processors/f/791/t/798011

    Regards,
    Garrett