AM4379: ADC values not valid

Hi Suresh,

A few questions for you:

How are you determining correct / incorrect sample values?

Are the first 2x Step outputs in the modified code correct?

Are any of the added 3x Step outputs shown in your log correct, or are all of them incorrect?

Which channels are you attempting to sample for each of the Steps? How do the settings for the Steps with correct sample output compare with those for the incorrect Steps?

Regards,
Frank

Hi Frank,

Thanks for your response.

Please find my replay below prefixed with "SURESH=>"

Frank Livingston said:

Hi Suresh,

A few questions for you:

How are you determining correct / incorrect sample values?

SURESH=> I have used multi-meter to measure the ADC channel & compared that with ADC debug log values. Find below table for measured and ADC sampled values

ADC Channel Number	ADC output (From Debug-log)	Measured By Multi-meter
0	Step ID: 1 Voltage Level: 2091mV	1.19mV
1	Step ID: 2 Voltage Level: 2102mV	0.81mV
2	Step ID: 3 Voltage Level: 1467mV	0mV
3	Step ID: 4 Voltage Level: 0mV	0.81mV
4	Step ID: 5 Voltage Level: 1408mV	0.80mV

Are the first 2x Step outputs in the modified code correct?

SURESH=> In previous post based "AM4379: ADC example problem" modified code working fine(ADC log values Exactly matched to the Multi meter measured value). Only able configure 2x ADC channels(ADC CH0 & ADC CH1)  

Are any of the added 3x Step outputs shown in your log correct, or are all of them incorrect?

SURESH=> After modified source code for 5x Step to get the ADC ch0 to ADC ch4 values. In this case all the ADC channel values are incorrect.

Which channels are you attempting to sample for each of the Steps? How do the settings for the Steps with correct sample output compare with those for the incorrect Steps?

SURESH=>  I used 5x Steps for 5x ADC channels.Like below, 

STEP 1  for ADC channel 0 
STEP 2  for ADC channel 1 
STEP 3  for ADC channel 2 
STEP 4  for ADC channel 3 
STEP 5  for ADC channel 4 

Regards,
Frank

Regards,
Suresh

Suresh,

Have you seen what happens when you:

• only add Step 3 & ADC channel 2
• only add Step 3, but with ADC channel 0 or 1 instead of channel 2?

For ADC channels beyond ADC0_AIN1, have you checked the settings for YPPSW, YPNSW, etc.?

Regards,
Frank

Hi Frank,

Please find below for  my reply for your Queries.

Q1: only add Step 3 & ADC channel 2

Only Step 3 & ADC channel 2

Source Code Section:

/* Initialize ADC configuration params */
adcConfig.mode = ADC_OPERATION_MODE_SINGLE_SHOT;

 // Refer this "hw_adc.h" file. If configure ADC ch 3 means, it actually configured ADC Channel 2.Since in system has ADC channel from '0' But in code ADC channel start from '1'
adcConfig.channel = ADC_CHANNEL_3;

adcConfig.openDelay = 0x1U;
adcConfig.sampleDelay = 0U;
adcConfig.rangeCheckEnable = 0U;
adcConfig.averaging = ADC_AVERAGING_16_SAMPLES;
adcConfig.fifoNum = ADC_FIFO_NUM_0;

/* step 2 configuration */
configStatus = TSCADCSetStepParams(pCfgAdc->instAddr, ADC_STEP_4, &adcConfig);      //If mention ADC_STEP_4 then it actually refer step 3. Refer "hw_adc.h" file 
if (STW_SOK != configStatus)
{
UART_printf("Error in ADC step configuration.\n");
}

Debug Log:

<<<<Start BIOS>>>>

ADC Test Start...
StarterWare ADC voltage measure application!!
ADC Step configuration. Done!!
ISR :[0]
ISR RISED.... Success
Number of samples in FIFO: 1
FIFO Data:
Step ID: 3 Voltage Level: 2107mV
Stop ADC
Power Down ADC
ADC Exit..!!

Q2: only add Step 3, but with ADC channel 0 or 1 instead of channel 2?

Only Step 3 & ADC channel 0

Source Code Section:

/* Initialize ADC configuration params */
adcConfig.mode = ADC_OPERATION_MODE_SINGLE_SHOT;

 // Refer this "hw_adc.h" file. If configure ADC ch 1 means, it actually configured ADC Channel 0.Since in system has ADC channel from '0' But in code ADC channel start from '1'
adcConfig.channel = ADC_CHANNEL_1;

adcConfig.openDelay = 0x1U;
adcConfig.sampleDelay = 0U;
adcConfig.rangeCheckEnable = 0U;
adcConfig.averaging = ADC_AVERAGING_16_SAMPLES;
adcConfig.fifoNum = ADC_FIFO_NUM_0;

/* step 2 configuration */
configStatus = TSCADCSetStepParams(pCfgAdc->instAddr, ADC_STEP_4, &adcConfig);      //If mention ADC_STEP_4 then it actually refer step 3. Refer "hw_adc.h" file 
if (STW_SOK != configStatus)
{
UART_printf("Error in ADC step configuration.\n");
}

Debug Log:

<<<<Start BIOS>>>>

ADC Test Start...
StarterWare ADC voltage measure application!!
ADC Step configuration. Done!!
ISR :[0]
ISR RISED.... Success
Number of samples in FIFO: 1
FIFO Data:
Step ID: 3 Voltage Level: 2070mV
Stop ADC
Power Down ADC
ADC Exit..!!

ADC Test End...

Only Step 3 & ADC channel 1

Source Code Section:

/* Initialize ADC configuration params */
adcConfig.mode = ADC_OPERATION_MODE_SINGLE_SHOT;

 // Refer this "hw_adc.h" file. If configure ADC ch 2 means, it actually configured ADC Channel 1.Since in system has ADC channel from '0' But in code ADC channel start from '1'
adcConfig.channel = ADC_CHANNEL_2;

adcConfig.openDelay = 0x1U;
adcConfig.sampleDelay = 0U;
adcConfig.rangeCheckEnable = 0U;
adcConfig.averaging = ADC_AVERAGING_16_SAMPLES;
adcConfig.fifoNum = ADC_FIFO_NUM_0;

/* step 2 configuration */
configStatus = TSCADCSetStepParams(pCfgAdc->instAddr, ADC_STEP_4, &adcConfig);      //If mention ADC_STEP_4 then it actually refer step 3. Refer "hw_adc.h" file 
if (STW_SOK != configStatus)
{
UART_printf("Error in ADC step configuration.\n");
}

Debug Log:

<<<<Start BIOS>>>>

ADC Test Start...
StarterWare ADC voltage measure application!!
ADC Step configuration. Done!!
ISR :[0]
ISR RISED.... Success
Number of samples in FIFO: 1
FIFO Data:
Step ID: 3 Voltage Level: 2083mV
Stop ADC
Power Down ADC
ADC Exit..!!

Q3: For ADC channels beyond ADC0_AIN1, have you checked the settings for YPPSW, YPNSW, etc.?

Need to configure the YPPSW, YPNSW registers in GP mode of ADC0?. I

Thanks & Regards,
Suresh

Hi Suresh,

I gather from your above logs that adding Step 3 for ADC ch 2 is correct?

What if you now add Step 4 & ADC ch 3?

Regards,
Frank

Hi Frank,

I explain  my issue once again for our better understanding.

Method 1: ADC0  channel 0 & 1 with FIFO 0 & FIFO1. (Refer example:  ti/pdk_am437x_1_0_15/packages/ti/starterware/examples/adc/volt_measure) 
In this method sampled voltage is matched to measured voltages. The ADC channel 1 sampled value stored in FIFO0, ADC channel 2 sampled value stored in FIFO1.  

Method 2: ADC0 Channels 0 to 4 with FIFO0 Store values using the STEP ID's.( Refer example: ti/pdk_am437x_1_0_15/packages/ti/csl/example/adc/adc_singleshot_test_app)
I created this thread for this method. In this case the ADC sampled & measured voltages are not same.


Even I have added the Step 4 with ADC ch3 in this case also i get wrong value.So i wanted to know, what is the voltage resolution in method 2 & ADC RANGE MAX?. 

Regards,
Suresh

Suresh,

Thanks for the clarifying remarks.

Were you able to build the unmodified CSL example ti/pdk_am437x_1_0_15/packages/ti/csl/example/adc/adc_singleshot_test_app? This example isn't supported OOB at part of AM437x PRSDK. Assuming you were able to build the example, does it provide correct ADC output values for all Steps & channels?

Does your hybrid code provide correct output for any number of Steps & channels? Is there a number of channels for which it works (e.g. 2) and a number for which it stops working (e.g. 3 or 4)?

I briefly reviewed your code and didn't find anything obviously wrong.

>> So i wanted to know, what is the voltage resolution in method 2 & ADC RANGE MAX?. 

I'm not familiar with the CSL example, so I need to review it before providing feedback on this question.

Regards,
Frank

Hi Frank,

Thanks for your great support.

I think, we concluded the ADC0 STEP configuration based Voltage measurement.  Since I have adjusted the "APP_ADC_RANGE_MAX" value for the AM437x chip-set then the ADC0 provided value is matched to the Measured Value!!.

Modified Code Section:

#if defined (SOC_TDA3XX) || defined (SOC_DRA78x) 

#define APP_ADC_RANGE_MAX (1024U)

#elif defined (SOC_AM65XX)

#define APP_ADC_RANGE_MAX (4096U)

#elif defined (SOC_AM437x) // For ADC PORTING added by SURESH

#define APP_ADC_RANGE_MAX (1795U) 

#endif

I have tested all channels & all working fine ;-)

Debug print for your reference:

StarterWare Boot Loader
BOARDInit status [0x0]
Platform : 2
SoC : [AM43XX]
Core : [A9]
Platform : 2
Board Detected : [IDKEVM]
Base Board Revision : [UNKNOWN]
Daughter Card Revision: [UNKNOWN]
Platform : 2
Copying application image from MMC/SD card to RAM
Jumping to StarterWare Application...

<<<<Start BIOS>>>>

ADC Test Start...
StarterWare ADC voltage measure application!!
ADC Step configuration. Done!!
ISR :[0]
ISR RISED.... Success
Number of samples in FIFO: 8
FIFO Data:
Step-ID:0 ADC-CH:0 Voltage Level: 1194mV
Step-ID:1 ADC-CH:1 Voltage Level: 824mV
Step-ID:2 ADC-CH:2 Voltage Level: 0mV
Step-ID:3 ADC-CH:3 Voltage Level: 806mV
Step-ID:4 ADC-CH:4 Voltage Level: 811mV
Step-ID:5 ADC-CH:5 Voltage Level: 804mV
Step-ID:6 ADC-CH:6 Voltage Level: 0mV
Step-ID:7 ADC-CH:7 Voltage Level: 1800mV
Stop ADC
Power Down ADC
ADC Exit..!!

  For your information, I can't able built the unmodified CSL example(adc_singleshot_test_app) for AM437x. So that I went for this ADC0 porting (Starterware ADC App ~> RTOS ADC App ~> RTOS STEP Based ADC App).

Now, I need to integrate/port ADC1 with my current Application.So could you help me to find the ADC1 related sample's available in PDK?. 


Thanks again for your wonderful support & let me know, if my ADC0 issue conclusion have any mistakes.


Regards,
Suresh