Hi,
Referring to https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/KeyStone-Hyperlink.pptx TI presentation, slide 21.
•PrivID index indicates which master is making the request.
§PrivID index is 4 bits.
§PrivID (on RX side) value is usually 0xD if request from core; 0xE if from other master
About what request do you speak here? Are you meaning that the dsp that is initiating a read or write through hyperlink and this is a request?
If the request (whatever it means) is done from a dsp core and is set to 0xD, how do you know which core it is? For what could you use this field if you set it to same value and you have 8 cores, like in c6678?
What means master and why to set to 0xE? It is using the receiver this 0xE value for something special? What is the difference between master and core in this discussion context?
In the https://e2e.ti.com/support/processors/f/791/p/846921/3134481#3134481 you said that privid is used to specify the core id. I am wrong or your responses correlated with TI documentation doesn't have any logic? How can a device could be used if the documentation is not clear ?
"Then, what will be the Tx address over the Hyperlink bus? Because this is from core 5, so the PrivID is 5, and put into address bit 31-28, secure bit is not used. The rest bit 27-0 comes from 0x456789a0 & 0x0FFF_FFFF, so the Tx address is 0x5567_89A0."
/Daniel
