EDMA3 UART Break Signal Behavior

Ali Ahmed,

The EDMA3 hardware will respond to each UART Receive event by transferring one data word or how ever many are defined for the transfer when using the UART's FIFO mode.

You will want to enable the error interrupt from the UART to the DSP if you want to detect error conditions. Then you will need to make tradeoffs between EDMA operation and UART FIFO operation and error status detection.

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Regards,
RandyP

If I understand correctly it means that I will have to register an ISR for the error condition. Am I correct in this assumption? Also this means the EDMA is only forwarded the RX FIFO trigger level interrupt and THR empty interrupts. Only the line status interrupt is forwarded to the isr. I thought when DMA mode is enabled all the interrupts go to the EMDA handler.

I have also hardware flow control enabled on this UART. Does the behavior change in EDMA mode from when the UART is in ISR or Poll mode.

I am going to describe a situation and can you give an insight into the behavior of UART+EDMA

PSP UART driver in EDMA mode.

break signal + 14 bytes sent by a transmitter. how would UART driver handle the break interrupt if it is not handled would the EDMA be able to receive the data bytes following the break signal even if no piece of code gets invoked to clear the break condition which is to read from the FIFO as long as the break signal is held on the UART lines.

Thanks,

Ali

Ali,

Ali Ahmed said:

If I understand correctly it means that I will have to register an ISR for the error condition. Am I correct in this assumption?

That is correct.  For details, please refer to section 2.9 of the UART User's Guide (SPRU997C)

Ali Ahmed said:

Also this means the EDMA is only forwarded the RX FIFO trigger level interrupt and THR empty interrupts.

Yes, section 2.10 of the User's Guide describes what events are registered by the EDMA

Ali Ahmed said:

Only the line status interrupt is forwarded to the isr.

Figure 8 of the User's Guide describes which conditions can generate an interrupt from the UART.  These are sent to the CPU, not to the EDMA handler.

I am not real familiar with the driver code, but after taking a glance at the ddc_uart.c file provided with the PSP, it looks like the UART generates the interrupt and simply clears the flag.  (Specifically, refer to the ddc_uartHandleRxError function.)  It would then be up to the CPU to decide what to do with the data bytes.  I believe the EDMA would still be able to receive them, but the data itself may be erroneous.

I am working with PSP version 1_10_03. The driver code that I have does not register the ISR if UART is opened in EDMA3 mode. The code in question is in file ddc_uart.c function PSP_uartCreate line number 300. The ISR for line condition is only register if the UART is opened in interrupt mode. So it seems it will not be able to handle the line status error conditions.

I looked at the implementation of UART driver in PSP 1_30_01. In that driver the code registers an ISR in EDMA mode so it would be able to handle the line status error conditions. This PSP version is however meant for DSP/BIOS 6.x and not applicable to DM6437. I am on version 5.41.09.34. Is there a version of PSP driver that I can use that does not have this problem.

Also the uart driver had a buffering mode in which the driver does not use any IOP link list. In this mode the driver is unable to signal the application of completion of the IOP request if a callback function is registered. Is that an intended limitation on the driver?

Last of all the instrumentation code relies on LOG_print4 which I think has been deprecated. Is this correct?