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OMAP-L138: PLL0ARM.OCSEL is not changed.

Part Number: OMAP-L138

Hi,

After setting PLL0,PLL1, I'm trying additional settings of OCSEL in supervisor mode. But It is set as OSCIN(0x14).
I can't change this register to any other selection like 0x17, 0x18.
Now, OSCDIV is enabled as 0x8000, but OCSEL is not changeable even though on the register view of CCS.
pinmux13 is set to OBSCLK, and I can obserb 24MHz at T18 pin.
Could you give me a piece of advice?

Best Regards,

Tanaka

  • Hi Tanaka,

    We have requested the concerned expertise to comment on this query.

    Thanks for your patience.

    Regards,

    Atul

  • Hi Tanaka,

    You should follow the procedure described in the TRM:
      To modify the PLL controller registers, use the following sequence:
    1. Write the correct key values to KICK0R and KICK1R registers.
    2. Clear the PLL_MASTER_LOCK bit in CFGCHIP0 and/or the PLL1_MASTER_LOCK bit in CFGCHIP3,
    as required.
    3. Configure the desired PLL controller register values.
    4. Set the PLL_MASTER_LOCK bit in CFGCHIP0 and/or the PLL1_MASTER_LOCK bit in CFGCHIP3,
    as required.
    5. Write an incorrect key value to the KICK0R and KICK1R registers.

    You cannot straightforward modify a PLL controller configuration.

    Best Regards,
    Yordan