AM3357: ICSS EMAC TX packet error

Kanae

Part Number: AM3357

Sitara Support Team,

My customer has the problem of TX packet errors with PRU/ICSS2 instance
on their custom board using AM3357,

Current status:
(1) The environment:
-S/W: TI PROCESSOR-SDK-RTOS-AM335X 4.02

(2) Based on the IP sample code of PRU/ICSS2 instance of ICEv2 in the above SDK is modified
to operate the IP of CPSW1 instance simultaneously.
Customer refers to "NIMU_ICSS_FtpExample_icev2AM335x_wSoCLib_armExampleproject",
because the sample software structure is close to their system.

(3) Error status:
At start-up, the IP address is assigned to each of the three instances; CPSW1, PRU1, PRU2 individually.
Customer checked six board totol, and the three boards are workinf well,
but other three boards cannot send on the PRU2 port every time.
Six boards's hardware are not different.
It is confirmed that the RX from PRU2 has been received and returned the received response,
and it makes the transmission request to PRU firmware. However the packet does not come out.

(4) Connect status: 100M Ether Port
Custom board PRU#0(RJ45)=====cross cable ===(switch by cable)===PC:Win10
Custom board PRU#1(RJ45)=====cross cable ===(switch by cable)=== (PC:Win10)
Custom board CPSW#0(RJ45)=====cross cable ==(switch by cable)=== (PC:Win10)

To check the following items for studying the reason to not send the packets.

-Calling "ICSS_EmacTxPacketEnqueue" requested packet transmission to PRU
in pdk_am335x_1_0_9/packages/ti/drv/icss_emac/src/icss_emacDrv.c,
The data is correctly set in PRU / ICSS.

-Checking the six boards with sending same data, and the results of each board are same.
Three boards have TX packet errors.

[Questions]
1. Is it possible to debug AM335x main CPU + PRU x2 simultaneously using CCS?

2. How does it check the status that PRU/ICSS does not send sach as "Error status from PRU/ICSS", etc?

Best regards,
Kanae

over 6 years ago

0 Garrett Ding over 6 years ago

TI__Mastermind 43296 points

Kanae,

1. Yes, you can step into both cores and debug...

2. You can refer to the ICSS_EMAC_testGetPruStats() in test_common_utils.c from icss_emac driver test\src to get the PRU stats like this:

ICSS_EmacReadStats(portNum, icssEmacHandle);
ICSS_EmacPruStatistics_t* pruStatsPtr = (ICSS_EmacPruStatistics_t *)(((ICSS_EmacObject *)icssEmacHandle->object)->pruStat);

PRINT("txBcast:0x%x\n", pruStatsPtr->txBcast);
PRINT("txMcast:0x%x\n", pruStatsPtr->txMcast);
PRINT("txUcast:0x%x\n", pruStatsPtr->txUcast);
PRINT("txOctets:0x%x\n", pruStatsPtr->txOctets);

PRINT("rxBcast:0x%x\n", pruStatsPtr->rxBcast);
PRINT("rxMcast:0x%x\n", pruStatsPtr->rxMcast);
PRINT("rxUcast:0x%x\n", pruStatsPtr->rxUcast);
PRINT("rxOctets:0x%x\n", pruStatsPtr->rxOctets);

PRINT("tx64byte:0x%x\n", pruStatsPtr->tx64byte);
PRINT("tx65_127byte:0x%x\n", pruStatsPtr->tx65_127byte);
PRINT("tx128_255byte:0x%x\n", pruStatsPtr->tx128_255byte);
PRINT("tx512_1023byte:0x%x\n", pruStatsPtr->tx512_1023byte);
PRINT("tx1024byte:0x%x\n", pruStatsPtr->tx1024byte);

...

Regards,

Garrett

0 Kanae over 6 years ago in reply to Garrett Ding

Guru 10235 points

Hi Garrett,

Thank you for your reply.

I would like to make sure how to debug three cores; AM335x main CPU + PRU x2 simultaneously.
If I use TMDXICE3359 board, the procedure is...

1. Connect Cortex-A8 using TMDXICE3359.gel.
2. Initialize PRI_ICSS from Scripts of CCS.
3. Connect PRU_0 and PRU_1
4. Load the sample program referring to the ICSS_EMAC_testGetPruStats() in test_common_utils.c to Cortex-A8.

Is my understanding correct?

Best regards,
Kanae

0 Garrett Ding over 6 years ago in reply to Kanae

TI__Mastermind 43296 points

Hi Kanae,

Usually the application like "NIMU_ICSS_FtpExample_icev2AM335x_wSoCLib_armExampleproject" initializes, loads and enables PRU, you don't have to use CCS script to initialize PRU-ICSS, instead, you can just run the application and then connect PRU cores to start debugging after PRU images are loaded and PRUs are enabled in application...

Regards,

Garrett

0 Kanae over 6 years ago in reply to Garrett Ding

Guru 10235 points

Hi Garrett,

Thank you for your support.

Regarding to Q1, my customer needs to know the operation simultaneously starting the A8 core

and downloading the PRU firmware.

Specifically, the following code is running the program from main CPU to PRU,

but after this how to debug this code simultaneously?

After this, it makes simply connect to the PRU and it PruEnable () makes to interrupt to the working PRU,

it can not debug as my customer expected. Could advise me how to debug simultaneously?

*****
     PRUICSS_pruDisable(pruIcssHandle, ICSS_EMAC_PORT_1-1);
     PRUICSS_pruDisable(pruIcssHandle, ICSS_EMAC_PORT_2-1);
     if(PRUICSS_pruWriteMemory(pruIcssHandle,PRU_ICSS_IRAM(0) ,0,
                           (uint32_t *) &pru_imem0_rev1_start,
                           &pru_imem0_rev1_end - &pru_imem0_rev1_start))
     {
         if(PRUICSS_pruWriteMemory(pruIcssHandle,PRU_ICSS_IRAM(1) ,0,
                               (uint32_t *) &pru_imem1_rev1_start,
                               &pru_imem1_rev1_end - &pru_imem1_rev1_start))
         {
             firmwareLoad_done = TRUE;
         }
     }

     if( firmwareLoad_done)
     {
         PRUICSS_pruEnable(pruIcssHandle, ICSS_EMAC_PORT_1-1);
         PRUICSS_pruEnable(pruIcssHandle, ICSS_EMAC_PORT_2-1);
     }

*****

Regarding Q2, here are the test results of ping from PC to the boards; OK and NG,

Could you point out the error from results?

Fullscreen NG_BOARD.txt Download

ICSS_EMAC_testGetPruStats: PRU/ICSS#0 (No Ethernet Cable / RJ45 Open)
txBcast:0x0
txMcast:0x0
txUcast:0x0
txOctets:0x0
rxBcast:0x0
rxMcast:0x0
rxUcast:0x0
rxOctets:0x0
tx64byte:0x0
tx65_127byte:0x0
tx128_255byte:0x0
tx512_1023byte:0x0
tx1024byte:0x0
rx64byte:0x0
rx65_127byte:0x0
rx128_255byte:0x0
rx512_1023byte:0x0
rx1024byte:0x0
lateColl:0x0
singleColl:0x0
multiColl:0x0
excessColl:0x0
rxMisAlignmentFrames:0x0
stormPrevCounter:0x0
macRxError:0x0
SFDError:0x0
defTx:0x0
macTxError:0x0
rxOverSizedFrames:0x0
rxUnderSizedFrames:0x0
rxCRCFrames:0x0
droppedPackets:0x0
txOverFlow:0x0
txUnderFlow:0x0
sqeTestError:0x0
TXqueueLevel:0x0
CSError:0x0

ICSS_EMAC_testGetPruStats: PRU/ICSS#1   (Connect to PC)
txBcast:0x13
txMcast:0x0
txUcast:0x2
txOctets:0x540
rxBcast:0x1e
rxMcast:0x4e
rxUcast:0x0
rxOctets:0x4ea3
tx64byte:0x15
tx65_127byte:0x0
tx128_255byte:0x0
tx512_1023byte:0x0
tx1024byte:0x0
rx64byte:0x11
rx65_127byte:0x3a
rx128_255byte:0x19
rx512_1023byte:0x0
rx1024byte:0x8
lateColl:0x0
singleColl:0x0
multiColl:0x0
excessColl:0x0
rxMisAlignmentFrames:0x0
stormPrevCounter:0x0
macRxError:0x0
SFDError:0x0
defTx:0xd53
macTxError:0x0
rxOverSizedFrames:0x0
rxUnderSizedFrames:0x0
rxCRCFrames:0x0
droppedPackets:0xe
txOverFlow:0x0
txUnderFlow:0x0
sqeTestError:0x0
TXqueueLevel:0x0
CSError:0x0

Fullscreen OK_BOARD.txt Download

ICSS_EMAC_testGetPruStats: PRU/ICSS#0 (No Ethernet Cable / RJ45 Open)
txBcast:0x0
txMcast:0x0
txUcast:0x0
txOctets:0x0
rxBcast:0x0
rxMcast:0x0
rxUcast:0x0
rxOctets:0x0
tx64byte:0x0
tx65_127byte:0x0
tx128_255byte:0x0
tx512_1023byte:0x0
tx1024byte:0x0
rx64byte:0x0
rx65_127byte:0x0
rx128_255byte:0x0
rx512_1023byte:0x0
rx1024byte:0x0
lateColl:0x0
singleColl:0x0
multiColl:0x0
excessColl:0x0
rxMisAlignmentFrames:0x0
stormPrevCounter:0x0
macRxError:0x0
SFDError:0x0
defTx:0x0
macTxError:0x0
rxOverSizedFrames:0x0
rxUnderSizedFrames:0x0
rxCRCFrames:0x0
droppedPackets:0x0
txOverFlow:0x0
txUnderFlow:0x0
sqeTestError:0x0
TXqueueLevel:0x0
CSError:0x0

ICSS_EMAC_testGetPruStats: PRU/ICSS#1   (Connect to PC)
txBcast:0xf
txMcast:0x0
txUcast:0xa
txOctets:0x6b0
rxBcast:0x1d
rxMcast:0x4c
rxUcast:0x9
rxOctets:0x4f95
tx64byte:0x11
tx65_127byte:0x8
tx128_255byte:0x0
tx512_1023byte:0x0
tx1024byte:0x0
rx64byte:0x12
rx65_127byte:0x41
rx128_255byte:0x17
rx512_1023byte:0x0
rx1024byte:0x8
lateColl:0x0
singleColl:0x0
multiColl:0x0
excessColl:0x0
rxMisAlignmentFrames:0x0
stormPrevCounter:0x0
macRxError:0x0
SFDError:0x0
defTx:0x5c8
macTxError:0x0
rxOverSizedFrames:0x0
rxUnderSizedFrames:0x0
rxCRCFrames:0x0
droppedPackets:0x0
txOverFlow:0x0
txUnderFlow:0x0
sqeTestError:0x0
TXqueueLevel:0x0
CSError:0x0

Best regards,
Kanae

0 Garrett Ding over 6 years ago in reply to Kanae

TI__Mastermind 43296 points

Kanae,

For Q1, would it help if they add a while loop with a condition in the very beginning of PRU code, and then modify the logical expression of condition to continue after the PRUICSS_pruEnable()...

For Q2, the stats does indicate TX packet dropped in PRU. Does this happen with a loopback test on PRU2 as well (instead of PC and PRU2)? Did you monitor the alive/link bits in the PHY/MDIO? Also, how does the wireshark packet capture look like?

And PRSDK v4.2 (pdk_am335x_1_0_9) is pretty old, have you tried the latest v6.0 (pdk_am335x_1_0_15)?

Regards,

Garrett

0 Garrett Ding over 6 years ago in reply to Garrett Ding

TI__Mastermind 43296 points

Kanae,

Any update on this?

Regards,

Garrett

0 Kanae over 6 years ago in reply to Garrett Ding

Guru 10235 points

Hi Garrett,

Thank you for following this.
My customer keeps investigating this issue.
I will ask him the progress and report it here.

Best regards,
Kanae

0 Garrett Ding over 6 years ago in reply to Kanae

TI__Mastermind 43296 points

Kanae,

Can we close the thread or the customer is still blocked?

Regards,

Garrett

0 Kanae over 6 years ago in reply to Garrett Ding

Guru 10235 points

Hi Garrett,

Thank you for giving me confirmation.
Customer has still been investigated this issue.

Best regards,
Kanae

0 Garrett Ding over 6 years ago in reply to Kanae

TI__Mastermind 43296 points

Kanae,

Any update? Thanks.

-Garrett

0 Kanae over 6 years ago in reply to Garrett Ding

Guru 10235 points

Hi Garrett,

Thank you for following up.
Customer does not finish to investigate this.

I will post here when I get their update status.

Best regards,
Kanae

0 Garrett Ding over 6 years ago in reply to Kanae

TI__Mastermind 43296 points

Kanae,

I'd like to close this one for now. Feel free to re-open it if needed.....

Thanks,

Garrett

0 Kanae over 6 years ago in reply to Garrett Ding

Guru 10235 points

Hi Garrett,

My customer keeps to study this issue.

He needs to know about the PRU TX errors.

How to observe "PRU R31: Receive Interface Data and Status" located in PRU ECAP
from Cortex-A8?

TRM: Table 4-32. PRU R31: Receive Interface Data and Status (Read Mode)

Should I re-open the other thread?

Best regards,
Kanae

0 Kanae over 6 years ago in reply to Kanae

Guru 10235 points

Hi Sitara support Team,

Are there any support members in this forum?
Has this year' s support ended?

Best regards
Kane

0 Kanae over 6 years ago in reply to Kanae

Guru 10235 points

Hi Garrett,

I am understanding to keep this thread because the new thread was shown "Access Denied".

Here are additional questions.

Q1. Is there another way to check "PRU/ICSS internal information and status"
from Cortex-A8 side other than "ICSS_EMAC_testGetPruStats ()"?

Q2. As you posted on dated Mon, Oct 28 2019, there is the way to check
the PRI status with ICSS_EMAC_testGetPruStats () of test_common_utils.c.
Could you please explain the meaning of all variables and the conditions to be updated?
Also, if there are any documentations on these variables, please provide me.

Best regards,
Kanae

0 Kanae over 6 years ago in reply to Kanae

Guru 10235 points

Hi Garrett,

Could I have your reply for the questions?

Should I post this as a new thread?

Best regards,
Kanae

0 Garrett Ding over 6 years ago in reply to Kanae

TI__Mastermind 43296 points

Kanae,

1. "Based on the memory map one can directly look at the memory in a CCS + Emulator environment and verify if driver/firmware is working correctly.", see

2. Please refer to https://processors.wiki.ti.com/index.php/ICSS_EMAC_LLD_developers_guide#Statistics

The thread has been opened for a long while. It would be good to create a new thread for individual questions so can be easily tracked.

Thanks,

Garrett

0 Kanae over 6 years ago in reply to Garrett Ding

Guru 10235 points

Hi Garrett,

Thank you for your support!

Best Regards,
Kanae

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AM3357: ICSS EMAC TX packet error