Queries related to McBSP, SDMA and PCM device

Here as much as possible I want to add one component after another so that problems can be easily traced and fixed.

Grishna

I don't have any examples which are broken down as per the list you supplied. However, I did provide you with an example which covers using the MCBSP with SDMA in your other thread - http://e2e.ti.com/support/dsp/omap_applications_processors/f/447/p/84750/292588.aspx#292588

  Paul

Thanks for the example.

I am new to writing drivers ....

The example that you have shared does not have interrupt handler, I would like to register an interrupt handler and when it gets called I should be knowing exactly for which channel it has been called etc, how can I do it ? can you share me the code ?(of course I am doing it on ARM side with QNX operating system).

also after transferring one buffer interrupt handler will get invoked and SDMA starts transferring the buffer 2. In ISR we will invoke couple of other functions to generate data.

I'm not familiar with QNX so I don't know how to register an Interrupt handler. I would suspect that there will be other QNX examples that would be a useful guide on how to do so.

When an interrupt is detected, the logical DMA channel generating the event can first be identified by reading the SDMA.DMA4_IRQSTATUS_Lj register. The event causing the interrupt then can be identified by reading the interrupt status via the relevant DMA channel SDMA.DMA4_CSRi register.

Please consult section 9 of the latest Technical Reference Manual (TRM) for more detailed information.

  Paul

Thanks.

I have predefined set of values for all McBSP registers, now what are the parameters that needs to be same for both McBSP & DMA.

What are the DMA registers that I need to configure with these values ? (I have configured both SDMA & McBSP and observing noise even after releasing the DMA & McBSP instances)

Girisha

Did you use the example as a guide to setting up the McBSP and SDMA? Setting up a similar loopback type test would help flush the code and using Code Composer with JTAG would help visualize what is happening.  

Do you get the expected results/data when using the McBSP without the DMA?

Really, the best source of information for configuring the DMA is the TRM.

  Paul 

I have used the code provided by you for configuring the DMA and added frame interrupt enabled in CICR register and added interrupt handler & masked csr register every time when the interrupt is generated ...

I am having the following problems,

1. Code runs some times but hangs most of the times waiting for the interrupt.

2. the behaviour is unpredictable ...

3. I am not able to hear anything in the output when the program runs !!! ...

can you please suggest me the solution ?

Girisha

Since I've never used this OS or have a replica of your setup it is very difficult to suggest the solution.

However, I would suggested the you step through you code to ensure that it is doing exactly what you expect.

Use breakpoints and/or add debug code to help track down the issue.

Track/count the interrupts and compare to the data transmitted to see if interrupts are missed.  

Another option that I have used is to send sequentially incrementing data over McBSP. If the data repeats or skips then an interrupt may have been missed.

Do you check for errors? An error flag may be getting set that will help point to the root problem.

  Paul

I have extracted the DMA configuration from the example code that you have given me,

i.e.

 dma4->channel[idx].csdp = 0x10002;
 dma4->channel[idx].ccr  = 0x81021;
 dma4->channel[idx].cen  = 16;
 dma4->channel[idx].cfn  = 1;
 dma4->channel[idx].cssa = Source buffer Physical address

 dma4->channel[idx].cdsa = McBSP2 dxr register address(i.e. 0x49022008)

 dma4->channel[idx].cse = 1;
 dma4->channel[idx].csf = 0;
 dma4->channel[idx].cde = 1;
 dma4->channel[idx].cdf = 0;

using DMA channel 10 for transfer

with this the executable is running but nothing is audible ...

Girisha

If you monitor the data being transmitted to you see the expected data?

Have you tried the debug I suggested in this thread http://e2e.ti.com/support/dsp/omap_applications_processors/f/447/p/85235/302987.aspx#302987?

Paul

Thanks for the reply.

It is difficult for us to debug the code using breakpoints. Also now DMA is transferring the data to McBSP & I am hearing some noise. (I dont have any device like ossilloscope to really check the signals ....).

I have verified that errno is not set. As I said earlier I have predefined set of register values for McBSP ... I want to configure DMA registers so that I can play PCM samples & hear proper audio on the target.

Currently I have McBSP configuration as,

rcr2_reg   = 0x00000001
rcr1_reg   = 0x000003A0
xcr2_reg   = 0x00000001
xcr1_reg   = 0x000003A0
srgr2_reg   =  0x000010FF
srgr1_reg   =  0x00001F00
mcr2_reg   = 0x00000201
mcr1_reg   = 0x00000201
rcera_reg   =  0x0000000F
rcerb_reg   =  0x00000000
xcera_reg   =  0x0000000F
xcerb_reg   =  0x00000000
pcr_reg   = 0x00000F03
sysconfig_reg  =  0x00000000
thrsh2_reg   =  0x00000000
thrsh1_reg   =  0x00000000
irqenable_reg  =  0x00000000
xccr_reg   =  0x00001008
rccr_reg   =  0x00000808

SDMA configuration as

ccr |= (DMA4_CCR_FS | DMA4_CCR_BS); 
cdf = 4; 
csdp = DMA4_CSDP_DATA_TYPE_32BIT;
ccr |= (DMA4_CCR_SRC_POST_INCR | DMA4_CCR_DST_CONSTANT);
cen = 1536;
cfn = 4;
cssa = buffer_physical_src;  
cdsa = McBSP_SDMA_MAPRxTx[ctx->instanceId][TRANSMIT].u32MCBSPi_BASE_ADDR + offsetof (t_McBSP, mcbsplp_dxr_reg);
csr = DMA4_CSR_MSK;
cicr = DMA4_CICR_FRAME_IE;
clnk_ctrl = DMA4_CLNK_CTRL_ENABLE_LNK | idx;

Please suggest me what should be the configurations ?

Can you tell me what device you are connecting too and, if applicable, what configuration you are using?

  Paul