Hello TI Support,
I'm currently porting some code to run on the C7x DSPs on a TDA4VM board. In order to get first code pieces running I'm using linker command files I found on some of the C7x examples. In order to expand those files for my own code, I'll need a memory map for the C7x. The TRM for the board only provides a detailed memory map for the C66x. The main memory map states:
| Region Name | Start Address | End Address | Size |
| COMPUTE_CLUSTER0_DSP0 | 0x0064000000 | 0x0064FFFFFF | 16 MB |
| COMPUTE_CLUSTER0_DSP1 | 0x0065000000 | 0x0065FFFFFF | 16 MB |
I have following questions.
- What are the regions of DSP0 and DSP1? There is one C7x and two C66x DSPs on the boards.
- Is there a detailed memory map for the C7x available, similar to the C66x memory map?
- Is the assumption from the example linker command files correct, that the L2SRAM for the C7x starts at 0x64800000 and has a maximal length of 0x080000?
- Is there a L2 SRAM/Cache configuration similar to the C66x possible?
- How can I access data outside the L2SRAM? Currently I run bare metal applications on the C7x. In the case I have data larger than the allowed heap/stack size, how can I access it from the global memory?
This information would help to write correct linker command files.
Thanks and kind regards,
Florian
