AM6548: R5 memory map

Tsurumoto

Genius 15344 points

Part Number: AM6548

There is memory map at chapter2 on TRM http://www.ti.com/lit/ug/spruid7d/spruid7d.pdf.

Is it only for A53?

I'd like to know the memory map for R5 view.

Thanks and Best regards,

HaTa.

over 5 years ago

0 Biser Gatchev-XID over 5 years ago

TI__Guru**** 393215 points

Hi,

The MCU memory map is in section 2.2 of the TRM.

0 Tsurumoto over 5 years ago in reply to Biser Gatchev-XID

TI__Genius 15344 points

For example,

What is the start address for I2C0 in main domain

at accessing from A53?

What is the start address for I2C in main domain

at accessing from R5?

0 JJD over 5 years ago in reply to Tsurumoto

TI__Guru* 86180 points

Between 0x0 and 0x7FFFFFFF, the memory maps are the same between the A53 and R5 cores. Thus you should be able to access a peripheral, whether in the Main or MCU domain, using the same addresses. Only MCU FSS and Main GPMC data regions will overlap if they are enabled.

Also, you can use the RAT to have the R5 access memory region beyond 32-bits if necessary.

Regards,

James

0 Tsurumoto over 5 years ago in reply to JJD

TI__Genius 15344 points

MCU FSS could be enabled in my system, and also want to use GPMC.

Is there any way to use (access) to both?

Thanks and Best regards,

HaTa.

0 JJD over 5 years ago in reply to Tsurumoto

TI__Guru* 86180 points

Only certain portions of GPMC and FSS data regions overlap. I'm assuming you won't be using the full 1GB of GPMC data region. If so, you should be able to access both of these data regions from the A53 and R5.

Regards,

james

0 Tsurumoto over 5 years ago in reply to JJD

TI__Genius 15344 points

How to switch the access target among GPMC and FSS while host (A53 or R5) accessing to overlapping address area of them?

For example, when A53 access to address area "0x0047040000", does this access pass to GPMC? or FSS?

Which configuration affect to above behavior?

Thanks and Best regards,

HaTa.

0 JJD over 5 years ago in reply to Tsurumoto

TI__Guru* 86180 points

HaTa,

in your example, it will depend on the configuration of the GPMC. If you want to use the FSS, ensure that the GPMC data space does not overlap 0x47040000 region by setting the GPMC BASEADDRESS bit fields appropriately in the GPMC controller. As long as they don't overlap, both hosts can access them without issues.

Regards,

James

Processors

Processors forum

AM6548: R5 memory map