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Hello,
I have see the question of [TDA4VM] Treatment for SERDES_REFCLK, the PCIE_REFCLKx and SERDES4_REFCLK can be define to input or output,
1. If we only using SERDES0 for SGMII and SERDES4 for display port, the PCIE_REFCLKx and SERDES4_REFCLK can be floating or connector to GND?
2. If we don't using SERDES1~3 port, TI suggest these pin need floating or connector to GND?
Best regards,
Tony
Hi Tony,
1. REFCLK pins can be left floating if unused
2. SERDES lanes are complex I/Os which will handle floating condition. These must be left unconnected.
Regards,
Stan