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TDA4 : How to change SPI module in TDA4 SW package v1.0

Hi.

The SW package TDA4_PSDKRA_RTOS(PSDK ver 1.0) for TDA4 is released by TI.

(PSDK ver 1.0, the Processor SDK  Automotive 06.01.00 release for the J721E platform)

We was checking the basic functions in J721EXCP01EVM(Board).

I am starting to develope SPI function(based on TI-RTOS, MCUSS_DEMO) on MCU R5_0 core in new our board, which includes TDA4.

(Application location : system\PSDKRA_RTOS\mcusw\mcuss_demos\inter_core_comm\ipc_spi_master)


I have one question.

Basically, the default configuration is as MCU_MCSPI2(Master) module.

For changing the "MCU_MCSPI2(Master)" module to MCU_MCSPI0(master), I need to change the configuration for the Pin, module etc.

And then, first of all,

I change the HW Unit ID, IpcSpiMasterApp_Isr ......

from ".hwUnitId = SPI_UNIT_MCU_MCSPI2," to ".hwUnitId = SPI_UNIT_MCU_MCSPI0". for SPI communication.
from IpcSpiMasterApp_Isr = Spi_IrqUnitMcuMcspi2TxRx; to IpcSpiMasterApp_Isr = Spi_IrqUnitMcuMcspi0TxRx;

And then, I am trying to add the related PIN configuration(the related content is being in the other E2E question) 

Despite above the configuration to operate MCU_MCSPI0(master) module,

MCU_MCSPI0(master) module is not operated (via Oscilloscope)

Do I need to change the additional configuration for operating the module well ?

Best regards,

Alex Jung

  • Hi Alex,

    I did not get a chance to check on this today, i will check and reply.

    Regards, Sujith

  • Hi Alex,

    Default IPC SPI Master Slave Demo demonstrates the IPC communication between Main Domain and MCU Domain cores(mcu1_0 and mpu1_0) using two SPI instances(MCU MCSPI2 and MCSPI4) which are connected internally. Simulates transmission and reception of messages of data size 4 bytes.

    So there is no explicit pin mux configuration done here.

    You need to add below code in the function IpcSpiMasterApp_Startup to do pin mux configuration for MCU MCSPI0 instance.

    -------------------- Source Code Starts -------------

        uint32 regVal = 0U;
        /* Unlock lock key registers for Partition 7: IO PAD
           configuration registers in MAIN_CTRL_MMR */
        /* write Partition 7 Lock Key 0 Register */
        CSL_REG32_WR(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1D008, 0x68EF3490);
        /* write Partition 7 Lock Key 1 Register */
        CSL_REG32_WR(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1D00C, 0xD172BC5A);
        /* Check for unlock */
        regVal = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1D008);
        while ((regVal & 0x1) != 0x1U)
        {
            regVal = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1D008);
        }
        /* MCSPI 0 CS0 PAD configuration */
        regVal = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1C09CU);
        regVal &= 0xFFFFFFF0U;
        CSL_REG32_WR(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1C09CU, regVal);

        /* MCSPI 0 D1 PAD configuration */
        regVal = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1C098U);
        regVal &= 0xFFDFFFF0U;
        CSL_REG32_WR(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1C098U, regVal);

        /* MCSPI 0 D0 PAD configuration */
        regVal = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1C094U);
        regVal &= 0xFFFFFFF0U;
        CSL_REG32_WR(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1C094U, regVal);

        /* MCSPI 0 CLK PAD configuration */
        regVal = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1C090U);
        regVal &= 0xFFFFFFF0U;
        CSL_REG32_WR(CSL_WKUP_CTRL_MMR0_CFG0_BASE + 0x1C090U, regVal);

    -------------------- Source Code End -------------

    The changes you have done is correct like changing the hwUnitId,IpcSpiMasterApp_Isr but also please update APP_SPI_MCU_2_INT to CSLR_MCU_R5FSS0_CORE0_INTR_MCU_MCSPI0_INTR_SPI_0

    Please increase the macro count APP_NUM_MSG_PER_ITERATION from 1000 to 100000 and comment out the portion shown below.

                /* Init transfer again to receive data from slave side */
                /* SetUp Tx and Rx Buffers */
                if (testPassed == E_OK)
                {
                    testPassed = IpcSpiMasterApp_SetUpBuffer(testParams, cfgPtr);
                }

                /* Transmit data */
                if (testPassed == E_OK)
                {
                    testPassed = IpcSpiMasterApp_AsyncTransmit(cfgPtr);
    #if ((SPI_SCALEABILITY == SPI_LEVEL_1) || \
    (SPI_SCALEABILITY == SPI_LEVEL_2))
                    if (SPI_INTERRUPT_MODE == SPI_APP_DEFAULT_ASYNC_MODE)
                    {
                        /* Wait for TX/RX to get over */
                        SemaphoreP_pend(IpcSpiMasterApp_RxConfirmationSemaphore,
                                         SemaphoreP_WAIT_FOREVER);
                    }
    #endif
                }

                if (testPassed == E_OK)
                {
                    /* Check RX buffer against TX buffer */
                    matching = IpcSpiMasterApp_DataCheck(testParams, cfgPtr);
                    if (TRUE != matching)
                    {
                        testPassed = E_NOT_OK;
                        AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
                            "McSPI data mismatch error!!\n");
                    }

    After doing these changes, please compile and re-run the application and you should see the CLK, Data(D1) and CS via oscilloscope.

    Regards,

    Sunil Kumar M S