Hi all,
I'm struggling to diagnose an issue with TIDL that is causing it to run very slowly.
I am running an OpenVX graph based on the provided AVP TIDL demo. Enabling VX_ZONE_INFO shows that the the graph is is bottlenecked by the TIDL node, which will output a frame every 20 minutes. Visualizing this output does not produce a coherent image.
In a previous thread which was deleted(?), it was suggested to use the standalone TI app to diagnose performance layer by layer. I was not able to get conclusive results from these tests:
Running the TIDL standalone app on PC shows 0 consumed cycles for each of 30 layers - it seems that an error somewhere is causing the test to cancel prematurely.
In a previous thread it was suggested to also try running the standalone demo on the EVM, but I am running into issues there as well - I get the following output from CCS when trying to continue from the first breakpoint on execution:
C71X_0: Trouble Reading Memory Block at 0x0 on Page 0 of Length 0x1: (Error -1344 - (0:0:0)) Register or Memory request has failed due to a Transaction Error. This may be the result of reading from a write only register, writing to a read only register, or accessing a memory location that is not assigned. No user action required. (Emulation package 8.3.1.00007)
C71X_0: Trouble Reading Memory Block at 0x707e8e42 on Page 0 of Length 0x1: (Error -1350 - (0:0:0)) Register or Memory request has timed out. The CPU is executing a High Priority Interrupt, this is typically due to a Double Page Fault. Choose 'Force' to force the CPU into a state that allows debug of why the HPI is active. (Emulation package 8.3.1.00007)
Any advice for moving forward on efforts on PC or EVM-based debugging would be greatly appreciated.
