AM3352: Ethernet issue with SDK 6.01

newuser

Part Number: AM3352

Hello,

On my board, I am using TI-PHY- DP83867, it is working ok with SDK-05.00.00.15., but when I tried to migrate to SDK-6.01.00.08, ethernet is not working.

I am attaching my log files for both SDK for your reference,

Thanks in advance.

6087.pass.txt 1602.fail.txt

am335x-evm-pcie_usb_dts_sdk5.txt

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	model = "TI AM335x EVM";
	compatible = "ti,am335x-evm", "ti,am33xx";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	chosen {
		stdout-path = &uart0;
	};

	leds {
		compatible = "gpio-leds";

		led0 {
			label = "onboard:green:usr1";
			gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
			/*default-state = "on";*/
			linux,default-trigger = "heartbeat";			
		};
	};
	
	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
	};

	v3v3c_reg: fixedregulator1 {
		compatible = "regulator-fixed";
	};

	vdd5_reg: fixedregulator2 {
		compatible = "regulator-fixed";
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	
	gpmc_pins: pinmux_gpmc_pins {
	pinctrl-single,pins = <
			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad8.gpmc_ad8 */
			AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad9.gpmc_ad9 */
			AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad10.gpmc_ad10 */
			AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad11.gpmc_ad11 */
			AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad12.gpmc_ad12 */
			AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad13.gpmc_ad13 */
			AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad14.gpmc_ad14 */
			AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad15.gpmc_ad15 */

			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
			AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)			/* gpmc_wpn.gpmc_wpn */
			AM33XX_IOPAD(0x878, PIN_OUTPUT | MUX_MODE0) 		/* gpmc_ben1.gpmc_ben1 */
			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)			/* gpmc_csn0.gpmc_csn0 */
			AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE0)			/* gpmc_csn1.gpmc_csn1 */
			AM33XX_IOPAD(0x884, PIN_OUTPUT | MUX_MODE0)			/* gpmc_csn2.gpmc_csn2 */
			AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE0)			/* gpmc_csn3.gpmc_csn3 */
			AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE0)			/* gpmc_clk.gpmc_clk */
			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)			/* gpmc_advn_ale.gpmc_advn_ale */
			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)			/* gpmc_oen_ren.gpmc_oen_ren */
			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)			/* gpmc_wen.gpmc_wen */
			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)			/* gpmc_ben0_cle.gpmc_ben0_cle */			

			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE1)			/* lcd_data0.gpmc_a0 */
			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE1)			/* lcd_data1.gpmc_a1 */
			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE1)			/* lcd_data2.gpmc_a2 */
			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE1)			/* lcd_data3.gpmc_a3 */
			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE1)			/* lcd_data4.gpmc_a4 */
			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE1)			/* lcd_data5.gpmc_a5 */
			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE1)			/* lcd_data6.gpmc_a6 */
			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE1)			/* lcd_data7.gpmc_a7 */

			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE1)			/* lcd_vsync.gpmc_a8 */
			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE1)			/* lcd_hsync.gpmc_a9 */
			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE1)			/* lcd_pclk.gpmc_a10 */
			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE1)			/* lcd_ac_bias_en.gpmc_a11 */
			
			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE1)			/* lcd_data8.gpmc_a12 */
			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE1)			/* lcd_data9.gpmc_a13 */
			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE1)			/* lcd_data10.gpmc_a14 */
			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE1)			/* lcd_data11.gpmc_a15 */
			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE1)			/* lcd_data12.gpmc_a16 */
			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE1)			/* lcd_data13.gpmc_a17 */
			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE1)			/* lcd_data14.gpmc_a18 */
			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE1)			/* lcd_data15.gpmc_a19 */			
		>;
	};

	spi0_pins: pinmux_spi0_pins {
	pinctrl-single,pins = <		
			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
			AM33XX_IOPAD(0x95C, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
			AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
		>;
	};
	
	spi1_pins: pinmux_spi1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE3)   /* mcasp0_aclkx.spi1_clk */
			AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE3)   /* MOSI - mcasp0_fsx.spi1_d0 */
			AM33XX_IOPAD(0x998, PIN_INPUT_PULLUP | MUX_MODE3)   /* MISO - mcasp0_axr0.spi1_d1 */
			AM33XX_IOPAD(0x99c, PIN_INPUT_PULLUP | MUX_MODE3)   /* mcasp0_ahclkr.spi1_cs0 */
			/*AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE2)*/   /* ecap0_in_pwm0_out.spi1_cs1 */
		>;
	};	
	
	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3)	/* i2c1_sda.i2c1_sda  */
			AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3)	/* i2c1_scl.i2c1_scl */
		>;
	};
	
	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};
	
	led_pins: pinmux_led_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_axr1.mcasp0_axr1 */
		>;
	};
	
	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
		>;
	};
	
	ethernet0_pins: pinmux_ethernet0 {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2)	/* mii1_txclk.rmii1_tclk */
			AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td2 */
			AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td3 */
			AM33XX_IOPAD(0x930, PIN_INPUT | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
			AM33XX_IOPAD(0x918, PIN_INPUT | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
			AM33XX_IOPAD(0x93c, PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			AM33XX_IOPAD(0x938, PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd2 */
			AM33XX_IOPAD(0x934, PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd3 */			
		>;
	};
	
	ethernet1_pins: pinmux_ethernet1 {
		/* NOT USED */
	};

	mdio_pins: pinmyx_mdio {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)					/* mdio_clk.mdio_clk */
		>;
	};
	
	misc_gpio_pins: pinmux_misc_gpio_pins {
		pinctrl-single,pins = <			
			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)		/* spi0_cs1.gpio0_6 */
			AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_rtsn.gpio0_13 */
			AM33XX_IOPAD(0x96c, PIN_OUTPUT_PULLUP | MUX_MODE7)	/* uart0_rtsn.gpio1_9 */
			AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a11.gpio1_27 mmc_reset */	
			AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* mcasp0_aclkr.gpio3_18 */
			AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* mcasp0_ahcklx.gpio3_21 */	
			AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLUP | MUX_MODE7)   	/* ecap0_in_pwm0_out.gpio0_7 */
		>;
	};
};
	
/*-----------------------------------------------------------------------------*/

&spi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;
	
	/*
	proc_nor_flash: proc_nor_flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "Micron,n25q128a11";
		spi-max-frequency = <16000000>;
		m25p,fast-read;
		reg = <0>;
		partition@0 {
			label = "u-boot-spl";
			reg = <0x0 0x20000>;
		};
		partition@1 {
			label = "u-boot";
			reg = <0x20000 0x80000>;
		};
		partition@2 {
			label = "nvram0";
			reg = <0xa0000 0x20000>;
		};
		partition@3 {
			label = "nvram1";
			reg = <0xc0000 0x20000>;
		};
		partition@4 {
			label = "scratch_pad";
			reg = <0xe0000 0x10000>;
		};
		partition@5 {
			label = "linux";
			reg = <0x100000 0xf00000>;
		};
	};
	*/	
	
	spi0_0: spi0_0@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "spidev";
		reg = <0>;
		spi-max-frequency = <16000000>;
	};
	
	spi0_1: spi0_1@1 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "spidev";
		reg = <1>;
		spi-max-frequency = <16000000>;
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	spi1_0: spi1_0@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "spidev";
		reg = <0>;
		spi-max-frequency = <16000000>;
		/*spi-cpha;
		spi-cpol;
		spi-cs-low;*/
	};

	/*spi1_1: spi1_1@1 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "spidev";
		reg = <1>;
		spi-max-frequency = <16000000>;
	};*/	
};
			
&misc_gpio_pins {
	pinctrl-names             = "default";
	pinctrl-0                 = <&misc_gpio_pins>;
	lcd-reset 		  		  = <&gpio1 9 GPIO_ACTIVE_LOW>;
	lcd-on    		  		  = <&gpio1 9 GPIO_ACTIVE_HIGH>;
	spi1_cs1_bmc_disable      = <&gpio0 7 GPIO_ACTIVE_HIGH>;
	mmc_reset                 = <&gpio1 27 GPIO_ACTIVE_LOW>;	
	bmc_proc_flash_sel_status = <&gpio0 6 GPIO_ACTIVE_HIGH>;
	usb_type_c_interrupt      = <&gpio0 13 GPIO_ACTIVE_HIGH>;
	lcd_reg_sel               = <&gpio3 18 GPIO_ACTIVE_HIGH>;
	fpga_to_proc_intr         = <&gpio3 21 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	pinctrl-1 = <&led_pins>;
	led-on    = <&gpio3 20 GPIO_ACTIVE_HIGH>;
	led-off   = <&gpio3 20 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	status = "okay";
	clock-frequency = <100000>;
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	status = "okay";
	clock-frequency = <100000>;
};

&mac {
	pinctrl-names = "default";
	pinctrl-0 = <&ethernet0_pins>;
	status = "okay";
};

&phy_sel {
	rmii-clock-ext = <1>;
};

&davinci_mdio {
	pinctrl-names = "default";
	pinctrl-0 = <&mdio_pins>;
	status = "okay";
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rgmii-txid";
	status = "okay";
};

&mmc1 {
	status = "okay";
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	max-frequency = <26000000>;
	ti,non-removable;
	vmmc-supply = <&v3v3c_reg>;
};

/* Power */
&vbat {
	regulator-name = "vbat";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
};

&v3v3c_reg {
	regulator-name = "v3v3c_reg";
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	vin-supply = <&vbat>;
};

&vdd5_reg {
	regulator-name = "vdd5_reg";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	vin-supply = <&vbat>;
};

&rtc {
	clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
	clock-names = "ext-clk", "int-clk";
};

&wkup_m3_ipc {
	ti,scale-data-fw = "am335x-evm-scale-data.bin";
};

&pruss_soc_bus {
	status = "okay";

	pruss: pruss@0 {
		status = "okay";
	};
};

&sgx {
	status = "okay";
};

&tscadc {
	status = "okay";
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&elm {
	status = "okay";
};

&epwmss0 {
	status = "okay";
};

&gpmc {
	compatible = "ti,am3352-gpmc";
	ti,hwmods = "gpmc";
	ti,no-idle-on-init;
	reg = <0x50000000 0x2000>;
	interrupts = <100>;
	dmas = <&edma 52 0>;
	dma-names = "rxtx";
	gpmc,num-cs = <4>;
	gpmc,num-waitpins = <2>;
	#address-cells = <2>;
	#size-cells = <1>;
	interrupt-controller;
	gpio-controller = <0>;
	#interrupt-cells = <1>;
	status = "disabled";			
	pinctrl-names = "default";
	pinctrl-0 = <&gpmc_pins>;
	ranges = <0 0 0x01000000 0x01000000			/* CS0: 16MBytes - skip first 16Mbytes */
			  1 0 0x02000000 0x01000000			/* CS1: 16MBytes  */
			  2 0 0x03000000 0x01000000			/* CS2: 16MBytes  */
			  3 0 0x04000000 0x01000000>;		/* CS3: 16MBytes  */
			  
	status = "okay";
	
	region_0@0,0 {
				reg = <0 0 0x01000000>;				/*CSn0*/				
				bank-width = <2>;					/* GPMC_CONFIG1_DEVICESIZE(1) */
				gpmc,sync-read;						/* GPMC_CONFIG1_READTYPE_ASYNC */
				gpmc,sync-write;					/* GPMC_CONFIG1_WRITETYPE_ASYNC */				
				gpmc,wait-on-read="true";
				gpmc,wait-on-write="true";
				gpmc,wait-pin = <0>;
				gpmc,wait-monitoring-ns = <0>;
				gpmc,clk-activation-ns = <0>;		/* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
				gpmc,burst-length = <16>;			/* GPMC_CONFIG1_PAGE_LEN(2) */
				gpmc,mux-add-data = <0>;			/* GPMC_CONFIG1_MUXTYPE(0) - non multiplexed */
				gpmc,sync-clk-ps = <20000>;			/* CONFIG2 */
				gpmc,cs-on-ns = <20>;
				gpmc,cs-rd-off-ns = <80>;
				gpmc,cs-wr-off-ns = <80>;
				gpmc,adv-on-ns = <0>;				/* CONFIG3 */
				gpmc,adv-rd-off-ns = <20>;
				gpmc,adv-wr-off-ns = <20>;
				gpmc,we-on-ns = <20>;				/* CONFIG4 */
				gpmc,we-off-ns = <80>;
				gpmc,oe-on-ns = <20>;
				gpmc,oe-off-ns = <80>;
				gpmc,page-burst-access-ns = <20>;	/* CONFIG 5 */
				gpmc,access-ns = <60>;
				gpmc,rd-cycle-ns = <160>;
				gpmc,wr-cycle-ns = <160>;
				gpmc,wr-access-ns = <60>;			/* CONFIG 6 */
				gpmc,wr-data-mux-bus-ns = <0>;
				gpmc,bus-turnaround-ns = <20>;		/* CONFIG6:3:0 = 4 */
				gpmc,cycle2cycle-samecsen;			/* CONFIG6:7 = 1 */
				gpmc,cycle2cycle-delay-ns = <20>;	/* CONFIG6:11:8 = 4 */
		};
	
	region_1@1,0 {
				reg = <1 0 0x01000000>;				/*CSn1*/				
				bank-width = <2>;					/* GPMC_CONFIG1_DEVICESIZE(1) */
				/*gpmc,burst-write;*/
				/*gpmc,burst-read;*/
				/*gpmc,burst-wrap;*/
				gpmc,sync-read;						/* GPMC_CONFIG1_READTYPE_ASYNC */
				gpmc,sync-write;					/* GPMC_CONFIG1_WRITETYPE_ASYNC */
				gpmc,clk-activation-ns = <0>;		/* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
				gpmc,burst-length = <16>;			/* GPMC_CONFIG1_PAGE_LEN(2) */
				gpmc,mux-add-data = <2>;			/* GPMC_CONFIG1_MUXTYPE(2) */
				gpmc,sync-clk-ps = <20000>;			/* CONFIG2 */
				gpmc,cs-on-ns = <0>;
				gpmc,cs-rd-off-ns = <100>;
				gpmc,cs-wr-off-ns = <40>;
				gpmc,adv-on-ns = <0>;				/* CONFIG3 */
				gpmc,adv-rd-off-ns = <20>;
				gpmc,adv-wr-off-ns = <20>;
				gpmc,we-on-ns = <20>;				/* CONFIG4 */
				gpmc,we-off-ns = <40>;
				gpmc,oe-on-ns = <20>;
				gpmc,oe-off-ns = <100>;
				gpmc,page-burst-access-ns = <20>;	/* CONFIG 5 */
				gpmc,access-ns = <80>;
				gpmc,rd-cycle-ns = <120>;
				gpmc,wr-cycle-ns = <60>;
				gpmc,wr-access-ns = <40>;			/* CONFIG 6 */
				gpmc,wr-data-mux-bus-ns = <20>;
				/*gpmc,bus-turnaround-ns = <40>;*/	/* CONFIG6:3:0 = 4 */
				gpmc,cycle2cycle-samecsen;			/* CONFIG6:7 = 1 */
				gpmc,cycle2cycle-delay-ns = <20>;	/* CONFIG6:11:8 = 4 */
				/* not using dma engine yet, but we can get the channel number here
				dmas = <&edma 1>;
				dma-names = "cscdma";
				*/
		};
		
		region_2@2,0 {
				reg = <2 0 0x01000000>;				/*CSn2*/				
				bank-width = <2>;					/* GPMC_CONFIG1_DEVICESIZE(1) */
				gpmc,sync-read;						/* GPMC_CONFIG1_READTYPE_ASYNC */
				gpmc,sync-write;					/* GPMC_CONFIG1_WRITETYPE_ASYNC */				
				gpmc,wait-on-read="true";
				gpmc,wait-on-write="true";				
				gpmc,wait-monitoring-ns = <0>;
				gpmc,clk-activation-ns = <0>;		/* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
				gpmc,burst-length = <16>;			/* GPMC_CONFIG1_PAGE_LEN(2) */
				gpmc,mux-add-data = <0>;			/* GPMC_CONFIG1_MUXTYPE(0) - non multiplexed */
				gpmc,sync-clk-ps = <20000>;			/* CONFIG2 */
				gpmc,cs-on-ns = <20>;
				gpmc,cs-rd-off-ns = <80>;
				gpmc,cs-wr-off-ns = <80>;
				gpmc,adv-on-ns = <0>;				/* CONFIG3 */
				gpmc,adv-rd-off-ns = <20>;
				gpmc,adv-wr-off-ns = <20>;
				gpmc,we-on-ns = <20>;				/* CONFIG4 */
				gpmc,we-off-ns = <80>;
				gpmc,oe-on-ns = <20>;
				gpmc,oe-off-ns = <80>;
				gpmc,page-burst-access-ns = <20>;	/* CONFIG 5 */
				gpmc,access-ns = <60>;
				gpmc,rd-cycle-ns = <160>;
				gpmc,wr-cycle-ns = <160>;
				gpmc,wr-access-ns = <60>;			/* CONFIG 6 */
				gpmc,wr-data-mux-bus-ns = <0>;
				gpmc,bus-turnaround-ns = <20>;		/* CONFIG6:3:0 = 4 */
				gpmc,cycle2cycle-samecsen;			/* CONFIG6:7 = 1 */
				gpmc,cycle2cycle-delay-ns = <20>;	/* CONFIG6:11:8 = 4 */
		};
		
		region_3@3,0 {
				reg = <3 0 0x01000000>;				/*CSn3*/				
				bank-width = <2>;					/* GPMC_CONFIG1_DEVICESIZE(1) */
				/*gpmc,burst-write;*/
				/*gpmc,burst-read;*/
				/*gpmc,burst-wrap;*/
				gpmc,sync-read;						/* GPMC_CONFIG1_READTYPE_ASYNC */
				gpmc,sync-write;					/* GPMC_CONFIG1_WRITETYPE_ASYNC */
				gpmc,clk-activation-ns = <0>;		/* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
				gpmc,burst-length = <16>;			/* GPMC_CONFIG1_PAGE_LEN(2) */
				gpmc,mux-add-data = <2>;			/* GPMC_CONFIG1_MUXTYPE(2) */
				gpmc,sync-clk-ps = <20000>;			/* CONFIG2 */
				gpmc,cs-on-ns = <0>;
				gpmc,cs-rd-off-ns = <100>;
				gpmc,cs-wr-off-ns = <40>;
				gpmc,adv-on-ns = <0>;				/* CONFIG3 */
				gpmc,adv-rd-off-ns = <20>;
				gpmc,adv-wr-off-ns = <20>;
				gpmc,we-on-ns = <20>;				/* CONFIG4 */
				gpmc,we-off-ns = <40>;
				gpmc,oe-on-ns = <20>;
				gpmc,oe-off-ns = <100>;
				gpmc,page-burst-access-ns = <20>;	/* CONFIG 5 */
				gpmc,access-ns = <80>;
				gpmc,rd-cycle-ns = <120>;
				gpmc,wr-cycle-ns = <60>;
				gpmc,wr-access-ns = <40>;			/* CONFIG 6 */
				gpmc,wr-data-mux-bus-ns = <20>;
				/*gpmc,bus-turnaround-ns = <40>;*/	/* CONFIG6:3:0 = 4 */
				gpmc,cycle2cycle-samecsen;			/* CONFIG6:7 = 1 */
				gpmc,cycle2cycle-delay-ns = <20>;	/* CONFIG6:11:8 = 4 */
				/* not using dma engine yet, but we can get the channel number here
				dmas = <&edma 1>;
				dma-names = "cscdma";
				*/
		};
		
};

&mcasp1 {
	status = "okay";
};

&usb {
	status = "okay";
};

&usb_ctrl_mod {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
};

&usb1 {
	status = "okay";
	dr_mode = "host";
};

am335x-evm-pcie_usb_dts_sdk6.txt

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	model = "TI AM335x EVM";
	compatible = "ti,am335x-evm", "ti,am33xx";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	chosen {
		stdout-path = &uart0;
	};

	leds {
		compatible = "gpio-leds";

		led0 {
			label = "onboard:green:usr1";
			gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
			/*default-state = "on";*/
			linux,default-trigger = "heartbeat";			
		};
	};
	
	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
	};

	v3v3c_reg: fixedregulator1 {
		compatible = "regulator-fixed";
	};

	vdd5_reg: fixedregulator2 {
		compatible = "regulator-fixed";
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	
	gpmc_pins: pinmux_gpmc_pins {
	pinctrl-single,pins = <
			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad8.gpmc_ad8 */
			AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad9.gpmc_ad9 */
			AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad10.gpmc_ad10 */
			AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad11.gpmc_ad11 */
			AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad12.gpmc_ad12 */
			AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad13.gpmc_ad13 */
			AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad14.gpmc_ad14 */
			AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad15.gpmc_ad15 */

			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
			AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)			/* gpmc_wpn.gpmc_wpn */
			AM33XX_IOPAD(0x878, PIN_OUTPUT | MUX_MODE0) 		/* gpmc_ben1.gpmc_ben1 */
			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)			/* gpmc_csn0.gpmc_csn0 */
			AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE0)			/* gpmc_csn1.gpmc_csn1 */
			AM33XX_IOPAD(0x884, PIN_OUTPUT | MUX_MODE0)			/* gpmc_csn2.gpmc_csn2 */
			AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE0)			/* gpmc_csn3.gpmc_csn3 */
			AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE0)			/* gpmc_clk.gpmc_clk */
			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)			/* gpmc_advn_ale.gpmc_advn_ale */
			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)			/* gpmc_oen_ren.gpmc_oen_ren */
			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)			/* gpmc_wen.gpmc_wen */
			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)			/* gpmc_ben0_cle.gpmc_ben0_cle */			

			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE1)			/* lcd_data0.gpmc_a0 */
			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE1)			/* lcd_data1.gpmc_a1 */
			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE1)			/* lcd_data2.gpmc_a2 */
			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE1)			/* lcd_data3.gpmc_a3 */
			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE1)			/* lcd_data4.gpmc_a4 */
			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE1)			/* lcd_data5.gpmc_a5 */
			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE1)			/* lcd_data6.gpmc_a6 */
			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE1)			/* lcd_data7.gpmc_a7 */

			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE1)			/* lcd_vsync.gpmc_a8 */
			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE1)			/* lcd_hsync.gpmc_a9 */
			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE1)			/* lcd_pclk.gpmc_a10 */
			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE1)			/* lcd_ac_bias_en.gpmc_a11 */
			
			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE1)			/* lcd_data8.gpmc_a12 */
			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE1)			/* lcd_data9.gpmc_a13 */
			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE1)			/* lcd_data10.gpmc_a14 */
			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE1)			/* lcd_data11.gpmc_a15 */
			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE1)			/* lcd_data12.gpmc_a16 */
			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE1)			/* lcd_data13.gpmc_a17 */
			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE1)			/* lcd_data14.gpmc_a18 */
			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE1)			/* lcd_data15.gpmc_a19 */			
		>;
	};

	spi0_pins: pinmux_spi0_pins {
	pinctrl-single,pins = <		
			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
			AM33XX_IOPAD(0x95C, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
			AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
		>;
	};
	
	spi1_pins: pinmux_spi1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE3)   /* mcasp0_aclkx.spi1_clk */
			AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE3)   /* MOSI - mcasp0_fsx.spi1_d0 */
			AM33XX_IOPAD(0x998, PIN_INPUT_PULLUP | MUX_MODE3)   /* MISO - mcasp0_axr0.spi1_d1 */
			AM33XX_IOPAD(0x99c, PIN_INPUT_PULLUP | MUX_MODE3)   /* mcasp0_ahclkr.spi1_cs0 */
			/*AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE2)*/   /* ecap0_in_pwm0_out.spi1_cs1 */
		>;
	};	
	
	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3)	/* i2c1_sda.i2c1_sda  */
			AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3)	/* i2c1_scl.i2c1_scl */
		>;
	};
	
	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};
	
	led_pins: pinmux_led_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_axr1.mcasp0_axr1 */
		>;
	};
	
	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
		>;
	};
	
	ethernet0_pins: pinmux_ethernet0 {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2)	/* mii1_txclk.rmii1_tclk */
			AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td2 */
			AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td3 */
			AM33XX_IOPAD(0x930, PIN_INPUT | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
			AM33XX_IOPAD(0x918, PIN_INPUT | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
			AM33XX_IOPAD(0x93c, PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			AM33XX_IOPAD(0x938, PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd2 */
			AM33XX_IOPAD(0x934, PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd3 */			
		>;
	};
	
	ethernet1_pins: pinmux_ethernet1 {
		/* NOT USED */
	};

	mdio_pins: pinmux_mdio {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)					/* mdio_clk.mdio_clk */
		>;
	};
	
	misc_gpio_pins: pinmux_misc_gpio_pins {
		pinctrl-single,pins = <			
			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)		/* spi0_cs1.gpio0_6 */
			AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_rtsn.gpio0_13 */
			AM33XX_IOPAD(0x96c, PIN_OUTPUT_PULLUP | MUX_MODE7)	/* uart0_rtsn.gpio1_9 */
			AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a11.gpio1_27 mmc_reset */	
			AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* mcasp0_aclkr.gpio3_18 */
			AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* mcasp0_ahcklx.gpio3_21 */	
			AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLUP | MUX_MODE7)   	/* ecap0_in_pwm0_out.gpio0_7 */
		>;
	};
};
	
/*-----------------------------------------------------------------------------*/

&spi0 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;
	
	/*
	proc_nor_flash: proc_nor_flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "Micron,n25q128a11";
		spi-max-frequency = <16000000>;
		m25p,fast-read;
		reg = <0>;
		partition@0 {
			label = "u-boot-spl";
			reg = <0x0 0x20000>;
		};
		partition@1 {
			label = "u-boot";
			reg = <0x20000 0x80000>;
		};
		partition@2 {
			label = "nvram0";
			reg = <0xa0000 0x20000>;
		};
		partition@3 {
			label = "nvram1";
			reg = <0xc0000 0x20000>;
		};
		partition@4 {
			label = "scratch_pad";
			reg = <0xe0000 0x10000>;
		};
		partition@5 {
			label = "linux";
			reg = <0x100000 0xf00000>;
		};
	};
	*/	
	
	spi0_0: spi0_0@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "spidev";
		reg = <0>;
		spi-max-frequency = <16000000>;
	};
	
	spi0_1: spi0_1@1 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "spidev";
		reg = <1>;
		spi-max-frequency = <16000000>;
	};
};

&spi1 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	spi1_0: spi1_0@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "spidev";
		reg = <0>;
		spi-max-frequency = <16000000>;
		/*spi-cpha;
		spi-cpol;
		spi-cs-low;*/
	};

	/*spi1_1: spi1_1@1 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "spidev";
		reg = <1>;
		spi-max-frequency = <16000000>;
	};*/	
};
			
&misc_gpio_pins {
	pinctrl-names             = "default";
	pinctrl-0                 = <&misc_gpio_pins>;
	lcd-reset 		  		  = <&gpio1 9 GPIO_ACTIVE_LOW>;
	lcd-on    		  		  = <&gpio1 9 GPIO_ACTIVE_HIGH>;
	spi1_cs1_bmc_disable      = <&gpio0 7 GPIO_ACTIVE_HIGH>;
	mmc_reset                 = <&gpio1 27 GPIO_ACTIVE_LOW>;	
	bmc_proc_flash_sel_status = <&gpio0 6 GPIO_ACTIVE_HIGH>;
	usb_type_c_interrupt      = <&gpio0 13 GPIO_ACTIVE_HIGH>;
	lcd_reg_sel               = <&gpio3 18 GPIO_ACTIVE_HIGH>;
	fpga_to_proc_intr         = <&gpio3 21 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	pinctrl-1 = <&led_pins>;
	led-on    = <&gpio3 20 GPIO_ACTIVE_HIGH>;
	led-off   = <&gpio3 20 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	status = "okay";
	clock-frequency = <100000>;
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	status = "okay";
	clock-frequency = <100000>;
};

&mac {
	slaves = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&ethernet0_pins>;
	status = "okay";
};

&phy_sel {
	rmii-clock-ext = <1>;
};

&davinci_mdio {
	pinctrl-names = "default";
	pinctrl-0 = <&mdio_pins>;
	status = "okay";

	phy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rgmii-txid";
	status = "okay";
};

&mmc1 {
	status = "okay";
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	max-frequency = <26000000>;
	ti,non-removable;
	vmmc-supply = <&v3v3c_reg>;
};

/* Power */
&vbat {
	regulator-name = "vbat";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
};

&v3v3c_reg {
	regulator-name = "v3v3c_reg";
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	vin-supply = <&vbat>;
};

&vdd5_reg {
	regulator-name = "vdd5_reg";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	vin-supply = <&vbat>;
};

/*
&rtc {
	clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
	clock-names = "ext-clk", "int-clk";
};
*/

&wkup_m3_ipc {
	ti,scale-data-fw = "am335x-evm-scale-data.bin";
};

/*
&pruss_soc_bus {
	status = "okay";

	pruss: pruss@0 {
		status = "okay";
	};
};
*/

&sgx {
	status = "okay";
};

&tscadc {
	status = "okay";
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&elm {
	status = "okay";
};

&epwmss0 {
	status = "okay";
};

&gpmc {
	compatible = "ti,am3352-gpmc";
	ti,hwmods = "gpmc";
	ti,no-idle-on-init;
	reg = <0x50000000 0x2000>;
	interrupts = <100>;
	dmas = <&edma 52 0>;
	dma-names = "rxtx";
	gpmc,num-cs = <4>;
	gpmc,num-waitpins = <2>;
	#address-cells = <2>;
	#size-cells = <1>;
	interrupt-controller;
	gpio-controller = <0>;
	#interrupt-cells = <1>;
	status = "disabled";			
	pinctrl-names = "default";
	pinctrl-0 = <&gpmc_pins>;
	ranges = <0 0 0x01000000 0x01000000			/* CS0: 16MBytes - skip first 16Mbytes */
			  1 0 0x02000000 0x01000000			/* CS1: 16MBytes  */
			  2 0 0x03000000 0x01000000			/* CS2: 16MBytes  */
			  3 0 0x04000000 0x01000000>;		/* CS3: 16MBytes  */
			  
	status = "okay";
	
	region_0@0,0 {
				reg = <0 0 0x01000000>;				/*CSn0*/				
				bank-width = <2>;					/* GPMC_CONFIG1_DEVICESIZE(1) */
				gpmc,sync-read;						/* GPMC_CONFIG1_READTYPE_ASYNC */
				gpmc,sync-write;					/* GPMC_CONFIG1_WRITETYPE_ASYNC */				
				gpmc,wait-on-read="true";
				gpmc,wait-on-write="true";
				gpmc,wait-pin = <0>;
				gpmc,wait-monitoring-ns = <0>;
				gpmc,clk-activation-ns = <0>;		/* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
				gpmc,burst-length = <16>;			/* GPMC_CONFIG1_PAGE_LEN(2) */
				gpmc,mux-add-data = <0>;			/* GPMC_CONFIG1_MUXTYPE(0) - non multiplexed */
				gpmc,sync-clk-ps = <20000>;			/* CONFIG2 */
				gpmc,cs-on-ns = <20>;
				gpmc,cs-rd-off-ns = <80>;
				gpmc,cs-wr-off-ns = <80>;
				gpmc,adv-on-ns = <0>;				/* CONFIG3 */
				gpmc,adv-rd-off-ns = <20>;
				gpmc,adv-wr-off-ns = <20>;
				gpmc,we-on-ns = <20>;				/* CONFIG4 */
				gpmc,we-off-ns = <80>;
				gpmc,oe-on-ns = <20>;
				gpmc,oe-off-ns = <80>;
				gpmc,page-burst-access-ns = <20>;	/* CONFIG 5 */
				gpmc,access-ns = <60>;
				gpmc,rd-cycle-ns = <160>;
				gpmc,wr-cycle-ns = <160>;
				gpmc,wr-access-ns = <60>;			/* CONFIG 6 */
				gpmc,wr-data-mux-bus-ns = <0>;
				gpmc,bus-turnaround-ns = <20>;		/* CONFIG6:3:0 = 4 */
				gpmc,cycle2cycle-samecsen;			/* CONFIG6:7 = 1 */
				gpmc,cycle2cycle-delay-ns = <20>;	/* CONFIG6:11:8 = 4 */
		};
	
	region_1@1,0 {
				reg = <1 0 0x01000000>;				/*CSn1*/				
				bank-width = <2>;					/* GPMC_CONFIG1_DEVICESIZE(1) */
				/*gpmc,burst-write;*/
				/*gpmc,burst-read;*/
				/*gpmc,burst-wrap;*/
				gpmc,sync-read;						/* GPMC_CONFIG1_READTYPE_ASYNC */
				gpmc,sync-write;					/* GPMC_CONFIG1_WRITETYPE_ASYNC */
				gpmc,clk-activation-ns = <0>;		/* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
				gpmc,burst-length = <16>;			/* GPMC_CONFIG1_PAGE_LEN(2) */
				gpmc,mux-add-data = <2>;			/* GPMC_CONFIG1_MUXTYPE(2) */
				gpmc,sync-clk-ps = <20000>;			/* CONFIG2 */
				gpmc,cs-on-ns = <0>;
				gpmc,cs-rd-off-ns = <100>;
				gpmc,cs-wr-off-ns = <40>;
				gpmc,adv-on-ns = <0>;				/* CONFIG3 */
				gpmc,adv-rd-off-ns = <20>;
				gpmc,adv-wr-off-ns = <20>;
				gpmc,we-on-ns = <20>;				/* CONFIG4 */
				gpmc,we-off-ns = <40>;
				gpmc,oe-on-ns = <20>;
				gpmc,oe-off-ns = <100>;
				gpmc,page-burst-access-ns = <20>;	/* CONFIG 5 */
				gpmc,access-ns = <80>;
				gpmc,rd-cycle-ns = <120>;
				gpmc,wr-cycle-ns = <60>;
				gpmc,wr-access-ns = <40>;			/* CONFIG 6 */
				gpmc,wr-data-mux-bus-ns = <20>;
				/*gpmc,bus-turnaround-ns = <40>;*/	/* CONFIG6:3:0 = 4 */
				gpmc,cycle2cycle-samecsen;			/* CONFIG6:7 = 1 */
				gpmc,cycle2cycle-delay-ns = <20>;	/* CONFIG6:11:8 = 4 */
				/* not using dma engine yet, but we can get the channel number here
				dmas = <&edma 1>;
				dma-names = "cscdma";
				*/
		};
		
		region_2@2,0 {
				reg = <2 0 0x01000000>;				/*CSn2*/				
				bank-width = <2>;					/* GPMC_CONFIG1_DEVICESIZE(1) */
				gpmc,sync-read;						/* GPMC_CONFIG1_READTYPE_ASYNC */
				gpmc,sync-write;					/* GPMC_CONFIG1_WRITETYPE_ASYNC */				
				gpmc,wait-on-read="true";
				gpmc,wait-on-write="true";				
				gpmc,wait-monitoring-ns = <0>;
				gpmc,clk-activation-ns = <0>;		/* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
				gpmc,burst-length = <16>;			/* GPMC_CONFIG1_PAGE_LEN(2) */
				gpmc,mux-add-data = <0>;			/* GPMC_CONFIG1_MUXTYPE(0) - non multiplexed */
				gpmc,sync-clk-ps = <20000>;			/* CONFIG2 */
				gpmc,cs-on-ns = <20>;
				gpmc,cs-rd-off-ns = <80>;
				gpmc,cs-wr-off-ns = <80>;
				gpmc,adv-on-ns = <0>;				/* CONFIG3 */
				gpmc,adv-rd-off-ns = <20>;
				gpmc,adv-wr-off-ns = <20>;
				gpmc,we-on-ns = <20>;				/* CONFIG4 */
				gpmc,we-off-ns = <80>;
				gpmc,oe-on-ns = <20>;
				gpmc,oe-off-ns = <80>;
				gpmc,page-burst-access-ns = <20>;	/* CONFIG 5 */
				gpmc,access-ns = <60>;
				gpmc,rd-cycle-ns = <160>;
				gpmc,wr-cycle-ns = <160>;
				gpmc,wr-access-ns = <60>;			/* CONFIG 6 */
				gpmc,wr-data-mux-bus-ns = <0>;
				gpmc,bus-turnaround-ns = <20>;		/* CONFIG6:3:0 = 4 */
				gpmc,cycle2cycle-samecsen;			/* CONFIG6:7 = 1 */
				gpmc,cycle2cycle-delay-ns = <20>;	/* CONFIG6:11:8 = 4 */
		};
		
		region_3@3,0 {
				reg = <3 0 0x01000000>;				/*CSn3*/				
				bank-width = <2>;					/* GPMC_CONFIG1_DEVICESIZE(1) */
				/*gpmc,burst-write;*/
				/*gpmc,burst-read;*/
				/*gpmc,burst-wrap;*/
				gpmc,sync-read;						/* GPMC_CONFIG1_READTYPE_ASYNC */
				gpmc,sync-write;					/* GPMC_CONFIG1_WRITETYPE_ASYNC */
				gpmc,clk-activation-ns = <0>;		/* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
				gpmc,burst-length = <16>;			/* GPMC_CONFIG1_PAGE_LEN(2) */
				gpmc,mux-add-data = <2>;			/* GPMC_CONFIG1_MUXTYPE(2) */
				gpmc,sync-clk-ps = <20000>;			/* CONFIG2 */
				gpmc,cs-on-ns = <0>;
				gpmc,cs-rd-off-ns = <100>;
				gpmc,cs-wr-off-ns = <40>;
				gpmc,adv-on-ns = <0>;				/* CONFIG3 */
				gpmc,adv-rd-off-ns = <20>;
				gpmc,adv-wr-off-ns = <20>;
				gpmc,we-on-ns = <20>;				/* CONFIG4 */
				gpmc,we-off-ns = <40>;
				gpmc,oe-on-ns = <20>;
				gpmc,oe-off-ns = <100>;
				gpmc,page-burst-access-ns = <20>;	/* CONFIG 5 */
				gpmc,access-ns = <80>;
				gpmc,rd-cycle-ns = <120>;
				gpmc,wr-cycle-ns = <60>;
				gpmc,wr-access-ns = <40>;			/* CONFIG 6 */
				gpmc,wr-data-mux-bus-ns = <20>;
				/*gpmc,bus-turnaround-ns = <40>;*/	/* CONFIG6:3:0 = 4 */
				gpmc,cycle2cycle-samecsen;			/* CONFIG6:7 = 1 */
				gpmc,cycle2cycle-delay-ns = <20>;	/* CONFIG6:11:8 = 4 */
				/* not using dma engine yet, but we can get the channel number here
				dmas = <&edma 1>;
				dma-names = "cscdma";
				*/
		};
		
};

&mcasp1 {
	status = "okay";
};

&usb {
	status = "okay";
};

&usb_ctrl_mod {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
};

&usb1 {
	status = "okay";
	dr_mode = "host";
};

over 5 years ago

0 Biser Gatchev-XID over 5 years ago

TI__Guru**** 393215 points

Please complete this checklist and post the results here: processors.wiki.ti.com/.../5x_CPSW

0 newuser over 5 years ago in reply to Biser Gatchev-XID

Intellectual 630 points

The requested information was already provided in my ticket (files were attached).

ethtool output is as follows:

root@pcie_usb:~# ifconfig
eth0 Link encap:Ethernet HWaddr 2C:6B:7D:56:22:1A
inet6 addr: fe80::2e6b:7dff:fe56:221a/64 Scope:Link
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:15 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:0 (0.0 B) TX bytes:2506 (2.4 KiB)
Interrupt:46

lo Link encap:Local Loopback
inet addr:127.0.0.1 Mask:255.0.0.0
inet6 addr: ::1/128 Scope:Host
UP LOOPBACK RUNNING MTU:65536 Metric:1
RX packets:8 errors:0 dropped:0 overruns:0 frame:0
TX packets:8 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:720 (720.0 B) TX bytes:720 (720.0 B)

# ethtool eth0

Settings for eth0:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
Advertised pause frame use: No
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Link partner advertised pause frame use: Symmetric
Link partner advertised auto-negotiation: Yes
Link partner advertised FEC modes: Not reported
Speed: 1000Mb/s
Duplex: Full
Port: MII
PHYAD: 0
Transceiver: internal
Auto-negotiation: on
Supports Wake-on: d
Wake-on: d
Current message level: 0x00000000 (0)

Link detected: yes

# ethtool -S eth0
NIC statistics:
Good Rx Frames: 0
Broadcast Rx Frames: 0
Multicast Rx Frames: 0
Pause Rx Frames: 0
Rx CRC Errors: 3
Rx Align/Code Errors: 143
Oversize Rx Frames: 0
Rx Jabbers: 0
Undersize (Short) Rx Frames: 0
Rx Fragments: 0
Rx Octets: 0
Good Tx Frames: 16
Broadcast Tx Frames: 5
Multicast Tx Frames: 11
Pause Tx Frames: 0
Deferred Tx Frames: 0
Collisions: 0
Single Collision Tx Frames: 0
Multiple Collision Tx Frames: 0
Excessive Collisions: 0
Late Collisions: 0
Tx Underrun: 0
Carrier Sense Errors: 0
Tx Octets: 2640
Rx + Tx 64 Octet Frames: 2
Rx + Tx 65-127 Octet Frames: 126
Rx + Tx 128-255 Octet Frames: 27
Rx + Tx 256-511 Octet Frames: 7
Rx + Tx 512-1023 Octet Frames: 0
Rx + Tx 1024-Up Octet Frames: 0
Net Octets: 16550
Rx Start of Frame Overruns: 0
Rx Middle of Frame Overruns: 0
Rx DMA Overruns: 0
Rx DMA chan 0: head_enqueue: 2
Rx DMA chan 0: tail_enqueue: 254
Rx DMA chan 0: pad_enqueue: 0
Rx DMA chan 0: misqueued: 0
Rx DMA chan 0: desc_alloc_fail: 0
Rx DMA chan 0: pad_alloc_fail: 0
Rx DMA chan 0: runt_receive_buf: 0
Rx DMA chan 0: runt_transmit_bu: 0
Rx DMA chan 0: empty_dequeue: 0
Rx DMA chan 0: busy_dequeue: 0
Rx DMA chan 0: good_dequeue: 1
Rx DMA chan 0: requeue: 1
Rx DMA chan 0: teardown_dequeue: 127
Tx DMA chan 0: head_enqueue: 16
Tx DMA chan 0: tail_enqueue: 0
Tx DMA chan 0: pad_enqueue: 0
Tx DMA chan 0: misqueued: 0
Tx DMA chan 0: desc_alloc_fail: 0
Tx DMA chan 0: pad_alloc_fail: 0
Tx DMA chan 0: runt_receive_buf: 0
Tx DMA chan 0: runt_transmit_bu: 0
Tx DMA chan 0: empty_dequeue: 17
Tx DMA chan 0: busy_dequeue: 0
Tx DMA chan 0: good_dequeue: 16
Tx DMA chan 0: requeue: 0
Tx DMA chan 0: teardown_dequeue: 0

0 Schuyler Patton over 5 years ago in reply to newuser

TI__Mastermind 38710 points

Hi,

Why is property being set the DTS file? Please try removing this update to the phy_sel node. The interface is rgmii, this clock setting should only be used when using the RMII interface mode.

&phy_sel {
rmii-clock-ext = <1>;
};

Best Regards,

Schuyler

0 newuser over 5 years ago in reply to Schuyler Patton

Intellectual 630 points

does rmii-clock-ext = <1>; means RMII_REFCLK pin (H18) ?

We are not using this pin, it is NC pin.

I removed rmii-clock-ext = <1>; but no change.

0 Schuyler Patton over 5 years ago in reply to newuser

TI__Mastermind 38710 points

Hi,

I compared the two DTS files that you posted. I have a couple of questions, why did you add the slaves property to the mac node? And why did you add the phy0 node to the davinci_mdio node?

I want to make sure I understand setup here, the different SDK binaries are being run on the same board with the DP83867 PHY? The 5.x SDK is working but the 6.x is not.

Are seeing any errors like this on the 5.x SDK from the output of ethtool -S eth0? These are from the post earlier in the thread for 6.x SDK>

Rx CRC Errors: 3
Rx Align/Code Errors: 143

When running the 83867 in RGMII mode there are some additional timing parameters that are necessary.

Best Regards,

Schuyler

0 newuser over 5 years ago in reply to Schuyler Patton

Intellectual 630 points

Hello,

I am not an expert in DTS file, and I find it is difficult to follow the syntax for me. I wish some GUI tools will be there, in which users can specify necessary settings and DTS/DTSI files get generated automatically.

Anyway, please suggest to me what kind of changes I should in DTS file?

You mentioned timing parameters, could you please elaborate on this, and where can I find? It will vary from one platform to another?

How to calculate?

thanks,

0 newuser over 5 years ago in reply to newuser

Intellectual 630 points

SDK5.0 is working OK,

But SDK6.0 has a problem.

0 newuser over 5 years ago in reply to newuser

Intellectual 630 points

As you can, see I am able to transmit, but receive path has a problem.

0 newuser over 5 years ago in reply to newuser

Intellectual 630 points

As you can, see I am able to transmit, but receive path has a problem.

0 Schuyler Patton over 5 years ago in reply to newuser

TI__Mastermind 38710 points

Hi,

Thanks for posting the wireshark captures. The only message being post are the messages being sent by your board. There should also be DHCP OFFER from the DHCP server and the DHCP REQUEST and ACK messages. The problem might be receive related only if if can be shown that messages I mentioned are in the capture.

Below is a picture of a capture showing the DHCP sequence of messages, messages 1,6,7,8.

Best Regards,

Schuyler

0 newuser over 5 years ago in reply to Schuyler Patton

Intellectual 630 points

I know, receive is not happening. How to fix it?

0 Schuyler Patton over 5 years ago in reply to newuser

TI__Mastermind 38710 points

Hi,

I apologize, I may not have explained what I am suggesting correctly. We need to prove that packets are actually being sent to the board before the receive path can be debugged.

Here I was suggesting that DHCP process might be followed here but the DHCP OFFER could be coming from another machine and it is a uni-cast response message that the Wireshark machine may not see. To see the unicast messages for the board you would need to use an Ethernet Tap or use a smart switch with port mirroring so you can see the traffic between the board being tested and its network.

So we need to prove that packets put to the interface at least get to the MAC statistics. So a quick test would be to connect another Linux machine such as the wireshark machine to the board. You will need to set the interface on the Wireshark machine with a static IP address so it transmits messages. Example would be to do this:

On the wireshark machine assuming that eth0 is directly connected to the board, I am assuming a Ubuntu machine is being used, also run wireshark while this is being done:

sudo ifconfig eth0 192.168.2.1 up

ping 192.168.2.10 ( this will not complete obviously)

On the board:

ethtool -S eth0

Here you will want to see the first field in the printed HW Statistics "Good RX Frames" count increasing. These are the ARP broadcast packets being sent from the wireshark machine. If the count is increasing the receive path is viable. If this shows packets then set the static IP address on the board like

ifconfig eth0 192.168.2.10 up

Then hopefully the ping works. If it doesn't then the RX path will need to be debugged.

Best Regards,

Schuyler

0 Schuyler Patton over 5 years ago in reply to Schuyler Patton

TI__Mastermind 38710 points

Hi,

Since we have not heard back I will assume that you were able to debug the RX Path and close the thread.

Best Regards,

Schuyler

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AM3352: Ethernet issue with SDK 6.01