TDA2EXEVM: Handling DSP interrupts with SYS Bios

Michal Ciesielski

Part Number: TDA2EXEVM

Hello,

I'm trying to implement interrupt handling in SYS Bios. The code looks as follow:

Void myIsr15(UArg arg);

int main(int argc, char* argv[])
{
  Error_Block eb;
  Error_init(&eb);
  Hwi_Params params;
  Hwi_Params_init(&params);

  params.eventId = 110;
  params.arg = params.eventId;
  params.enableInt = FALSE;
  params.maskSetting = Hwi_MaskingOption_SELF;

  Hwi_Handle hwi;
  hwi = Hwi_create(15, myIsr15, &params, &eb);

  if (hwi == NULL)
  {
    Error_check(&eb);
    Log_print0(Diags_STATUS, "Error registering an interrupt.");
  }

  Hwi_enableInterrupt(15);

  BIOS_start();

  return 0;
}

Later in my application I run:

HW_WR_REG32(CSL_C66X_COREPAC_REG_BASE_ADDRESS_REGS + 0x2C, 0x00004000);

...to manually trigger this specific interrupt. I would expect to see:

+++ Interrupt 15 occured

...as an output, but the interrupt handler never triggers. It does trigger when the interrupts are manually configured with CSL, but we don't want to mix CSL and SYS Bios.

Any idea why the SYS Bios implementation doesn't work?

over 5 years ago

0 Brad Griffis over 5 years ago

TI__Guru*** 125430 points

Michal Ciesielski said:
params.eventId = 110;

Which interrupt are you trying to map? That appears to be MDMAERREVT. Is that your intent?

Michal Ciesielski said:
hwi = Hwi_create(15, myIsr15, &params, &eb);

This provides a direct mapping of MDMAERREVT to HWI15.

Michal Ciesielski said:
HW_WR_REG32(CSL_C66X_COREPAC_REG_BASE_ADDRESS_REGS + 0x2C, 0x00004000);

This appears to be a write to address 0x0180002C, EVTSET3. You are setting bit 14 which corresponds to event 110.

The issue here is that this bit you are setting pertains to the "event combiner" hardware. There are only 12 direct-mapped interrupts available for use (HWI4-HWI15). Since many applications might have more than 12 total interrupts, we needed the event combiner to solve this issue. It is another layer of flags and enables that can funnel into a single direct-mapped interrupt. However, because you're using a direct-mapped interrupt, this isn't the correct way to test out this event. Instead, you should be using the Interrupt Set Register (ISR). That's a CPU register (i.e. it is not memory mapped), so you would access as follows:

extern cregister volatile unsigned int ISR;

ISR = (1<<15); // trigger HWI15

Best regards,
Brad

0 Michal Ciesielski over 5 years ago in reply to Brad Griffis

Intellectual 540 points

Hello Brad. Thank you for your response.

Yes, the intent is to use the MDMAERREVT - we need a memory protection using CorePac's XMC.

I've tested setting the ISR flag, and that triggers the interrupt as expected. Is there a way to test this setup via the events without the events combiner, or do I have to mask the 110 to EVT3 and then map EVT3 to the interrupt to do that?

/Michal

0 Brad Griffis over 5 years ago in reply to Michal Ciesielski

TI__Guru*** 125430 points

Michal Ciesielski said:
I've tested setting the ISR flag, and that triggers the interrupt as expected. Is there a way to test this setup via the events without the events combiner, or do I have to mask the 110 to EVT3 and then map EVT3 to the interrupt to do that?

If you want to fully test it, you need to deliberately force a MDMAERREVT to occur. You can't "fake" the event. I think it would be a good idea to test out handling an actual MDMAERREVT because that will allow you to test if you're clearing out the error correctly and can generate and detect multiple MDMAERREVT's.

0 Michal Ciesielski over 5 years ago in reply to Brad Griffis

Intellectual 540 points

Ok, I understand. Thank you. I think that solves this issue.

Regards, Michal

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TDA2EXEVM: Handling DSP interrupts with SYS Bios